/* Linker script to configure memory regions. * * SPDX-License-Identifier: BSD-3-Clause ****************************************************************************** * @attention * * Copyright (c) 2016-2020 STMicroelectronics. * All rights reserved. * * This software component is licensed by ST under BSD 3-Clause license, * the "License"; You may not use this file except in compliance with the * License. You may obtain a copy of the License at: * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** */ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; } /* [ROM = 1024kb = 0x100000] */ define symbol __intvec_start__ = MBED_APP_START; define symbol __region_ROM_start__ = MBED_APP_START; define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* [RAM = 96kb + 32kb = 0x20000] */ /* Vector table dynamic copy: Total: 98 vectors * 4 = 392 bytes (0x188) to be reserved in RAM */ define symbol __NVIC_start__ = 0x10000000; define symbol __NVIC_end__ = 0x10000187; define symbol __region_CSTACK_start__ = 0x10000188; define symbol __region_CSTACK_end__ = __region_CSTACK_start__ + MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __region_SRAM2_start__ = __region_CSTACK_end__; define symbol __region_SRAM2_end__ = 0x10007FFF; define symbol __region_CRASH_DATA_RAM_start__ = 0x20000000; define symbol __region_CRASH_DATA_RAM_end__ = 0x200000FF; define symbol __region_SRAM1_start__ = 0x20000100; define symbol __region_SRAM1_end__ = 0x20017FFF; /* Memory regions */ define memory mem with size = 4G; define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]; define region CSTACK_region = mem:[from __region_CSTACK_start__ to __region_CSTACK_end__]; define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__]; define region RAM_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__] | mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; /* Define Crash Data Symbols */ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__; define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with expanding size, alignment = 8, minimum size = __size_heap__ { }; initialize by copy with packing = zeros { readwrite }; do not initialize { section .noinit }; place at address mem:__intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; place in CSTACK_region { block CSTACK }; place in RAM_region { block HEAP, readwrite, zeroinit };