#! armcc -E

#if !defined(MBED_APP_START)
  #define MBED_APP_START            0x00000000
#endif

; 32K flash
#if !defined(MBED_APP_SIZE)
  #define MBED_APP_SIZE             0x80000
#endif

; 4KB
#if !defined(MBED_RAM_START)
  #define MBED_RAM_START            0x10000000
#endif

#if !defined(MBED_RAM_SIZE)
  #define MBED_RAM_SIZE             0x00008000
#endif


#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
  #define MBED_CONF_TARGET_BOOT_STACK_SIZE      0x400
#endif

; 8_byte_aligned(49 vect * 4 bytes) =  8_byte_aligned(0xC4) = 0xC8
#define VECTOR_SIZE                 0xC8

#define RAM_FIXED_SIZE              (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE+0x20)

LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region

  ER_IROM0  MBED_APP_START  0x2FC  {  ; load address = execution address
    *.o (RESET, +First)
    .ANY (+RO)
  }

    ER_CRP (MBED_APP_START + 0x2FC) FIXED 4  {
    *.o (.CRPSection)
  }
  
  ER_IROM1 (MBED_APP_START + (0x2FC + 4)) FIXED (MBED_APP_SIZE - (0x2FC + 4))  {
   *(InRoot$$Sections)
   .ANY (+RO)
  }

  ; 32KB (RAM size) - 0xC8 (NIVT) - 32 (topmost 32 bytes used by IAP functions) = 0x7F18
  RW_IRAM1  (MBED_RAM_START+VECTOR_SIZE)  (MBED_RAM_SIZE-VECTOR_SIZE-0x20)  {  ; RW data
   .ANY (+RW +ZI)
  }

  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
  }

  RW_IRAM2 0x2007C000 0x4000  {  ; RW data, USB RAM
   .ANY (AHBSRAM0)
  }

  RW_IRAM3 0x20080000 0x4000  {  ; RW data, ETH RAM
   .ANY (AHBSRAM1)
  }

  RW_IRAM4 0x40038000 0x0800  {  ; RW data, CAN RAM
   .ANY (CANRAM)
  }

  ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack
  }
}