/* mbed Microcontroller Library * Copyright (c) 2006-2020 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. */ /**************************************************************************** * * Copyright 2020 Samsung Electronics All Rights Reserved. * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, * software distributed under the License is distributed on an * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, * either express or implied. See the License for the specific * language governing permissions and limitations under the License. * ****************************************************************************/ /* Linker script to configure memory regions. */ #include "../memory_zones.h" #include "../cmsis_nvic.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE RAM (rwx) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE } /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. * It references following symbols, which must be defined in code: * Reset_Handler : Entry of reset handler * * It defines following symbols, which code can use without definition: * __exidx_start * __exidx_end * __etext * __data_start__ * __preinit_array_start * __preinit_array_end * __init_array_start * __init_array_end * __fini_array_start * __fini_array_end * __data_end__ * __bss_start__ * __bss_end__ * __end__ * end * __HeapLimit * __StackLimit * __StackTop * __stack */ ENTRY(Reset_Handler) HEAP_SIZE = 0x1000; STACK_SIZE = 0x400; /* Size of the vector table in SRAM */ M_VECTOR_RAM_SIZE = NVIC_NUM_VECTORS * 4; SECTIONS { .isr_vector : { __vector_table = .; KEEP(*(.vectors)) . = ALIGN(4); } > FLASH .text : { . = ALIGN(4); *(.text*) KEEP(*(.init)) KEEP(*(.fini)) /* .ctors */ *crtbegin.o(.ctors) *crtbegin?.o(.ctors) *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) *(SORT(.ctors.*)) *(.ctors) /* .dtors */ *crtbegin.o(.dtors) *crtbegin?.o(.dtors) *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) *(SORT(.dtors.*)) *(.dtors) *(.rodata*) KEEP(*(.eh_frame*)) } > FLASH .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } > FLASH __exidx_start = .; .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } > FLASH __exidx_end = .; .interrupts_ram : { _ram_vectors = ABSOLUTE(.); . = ORIGIN(RAM) + NVIC_VECTORS_SIZE; . = ALIGN(4); } > RAM .data : { PROVIDE(__etext = LOADADDR(.data)); . = ALIGN(4); __data_start__ = .; *(vtable) *(.data*) . = ALIGN(4); /* preinit data */ PROVIDE (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE (__preinit_array_end = .); . = ALIGN(4); /* init data */ PROVIDE (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE (__init_array_end = .); . = ALIGN(4); /* finit data */ PROVIDE (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE (__fini_array_end = .); . = ALIGN(4); /* All data end */ __data_end__ = .; } > RAM AT > FLASH .uninitialized (NOLOAD): { . = ALIGN(32); __uninitialized_start = .; *(.uninitialized) KEEP(*(.keep.uninitialized)) . = ALIGN(32); __uninitialized_end = .; } > RAM .bss : { . = ALIGN(4); __START_BSS = .; __bss_start__ = .; *(.bss*) *(COMMON) . = ALIGN(4); __bss_end__ = .; __END_BSS = .; } > RAM bss_size = __bss_end__ - __bss_start__; .heap : { . = ALIGN(8); __end__ = .; PROVIDE(end = .); __HeapBase = .; . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > RAM /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackLimit = __StackTop - STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") } /* End of sections */