#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m3

/*
 * MPS2 CMSIS Library
 *
 * Copyright (c) 2006-2018 ARM Limited. All rights reserved.
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the License); you may
 * not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

/*
 *************************************************************
 *** Scatter-Loading Description File                      ***
 *************************************************************
 */

#include "../memory_zones.h"
#include "../cmsis_nvic.h"

#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#  if defined(MBED_BOOT_STACK_SIZE)
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#  else
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#  endif
#endif

#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE

; The vector table is loaded at address 0x00000000 in Flash memory region.
LR_IROM1 FLASH_START FLASH_SIZE  {
  ER_IROM1 FLASH_START FLASH_SIZE  {
   *.o (RESET, +First)
  }
}

; Rest of the code is loaded to the ZBT SSRAM1.
LR_IROM2 ZBT_SSRAM1_START ZBT_SSRAM1_SIZE {
  ER_IROM2 ZBT_SSRAM1_START ZBT_SSRAM1_SIZE-Stack_Size  {
   *(InRoot$$Sections)
   .ANY (+RO)
  }
  ARM_LIB_STACK ZBT_SSRAM1_START+ZBT_SSRAM1_SIZE EMPTY -Stack_Size { ; Stack region growing down
  }
  ; At execution, RAM is set to be in ZBT SSRAM2 and 3, just after the vector
  ; table previously moved from Flash.
  RW_IRAM1 (ZBT_SSRAM23_START + NVIC_VECTORS_SIZE) (ZBT_SSRAM23_SIZE - NVIC_VECTORS_SIZE)  {
   .ANY (+RW +ZI)
  }
}