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*******************************************************************************/ 
/* Copyright (c) 2018-2020 Renesas Electronics Corporation.
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
/*******************************************************************************
* Rev: 2.00
* Description : IO bitmask header
*******************************************************************************/

#ifndef OSTM_IOBITMASK_H
#define OSTM_IOBITMASK_H


/* ==== Mask values for IO registers ==== */

#define OSTM_OSTMnCMP_OSTMnCMP                                                 (0xFFFFFFFFu)
#define OSTM_OSTMnCMP_OSTMnCMP_SHIFT                                           (0u)
#define OSTM_OSTMnCNT_OSTMnCNT                                                 (0xFFFFFFFFu)
#define OSTM_OSTMnCNT_OSTMnCNT_SHIFT                                           (0u)
#define OSTM_OSTMnTE_OSTMnTE                                                   (0x01u)
#define OSTM_OSTMnTE_OSTMnTE_SHIFT                                             (0u)
#define OSTM_OSTMnTS_OSTMnTS                                                   (0x01u)
#define OSTM_OSTMnTS_OSTMnTS_SHIFT                                             (0u)
#define OSTM_OSTMnTT_OSTMnTT                                                   (0x01u)
#define OSTM_OSTMnTT_OSTMnTT_SHIFT                                             (0u)
#define OSTM_OSTMnCTL_OSTMnMD0                                                 (0x01u)
#define OSTM_OSTMnCTL_OSTMnMD0_SHIFT                                           (0u)
#define OSTM_OSTMnCTL_OSTMnMD1                                                 (0x02u)
#define OSTM_OSTMnCTL_OSTMnMD1_SHIFT                                           (1u)

#endif