Newer
Older
mbed-os / targets / TARGET_Analog_Devices / TARGET_ADUCM4X50 / TARGET_ADUCM4050 / TOOLCHAIN_ARM_STD / ADuCM4050.sct
#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m4
;******************************************************************************
;  File: ADuCM4050.sct
;  Scatter loading file for Analog Devices ADuCM4050 processor
;
;  Copyright (c) 2011 - 2014 ARM LIMITED
;  Copyright (c) 2016 - 2018 Analog Devices, Inc.
;
;  All rights reserved.
;  Redistribution and use in source and binary forms, with or without
;  modification, are permitted provided that the following conditions are met:
;  - Redistributions of source code must retain the above copyright
;    notice, this list of conditions and the following disclaimer.
;  - Redistributions in binary form must reproduce the above copyright
;    notice, this list of conditions and the following disclaimer in the
;    documentation and/or other materials provided with the distribution.
;  - Neither the name of ARM nor the names of its contributors may be used
;    to endorse or promote products derived from this software without
;    specific prior written permission.
;
;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
;  ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
;  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
;  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
;  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
;  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
;  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
;  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
;  POSSIBILITY OF SUCH DAMAGE.
;******************************************************************************
#if !defined(MBED_APP_START)
  #define MBED_APP_START 0
#endif

#if !defined(MBED_APP_SIZE)
  #define MBED_APP_SIZE 0x7F000
#endif

#define ADUCM_SECTOR_SIZE 0x800

#define ADUCM_VECTOR_SIZE 0x1A0

#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#  if defined(MBED_BOOT_STACK_SIZE)
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#  else
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#  endif
#endif

#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE

LR_IROM1 MBED_APP_START MBED_APP_SIZE {
    FLASH0 MBED_APP_START ADUCM_VECTOR_SIZE {
        *(.vectors, +First)
    }

    FLASH1 (MBED_APP_START + ADUCM_VECTOR_SIZE) (ADUCM_SECTOR_SIZE - ADUCM_VECTOR_SIZE) {
        *(.checksum, +Last)
    }

    ER_IROM1 (MBED_APP_START + ADUCM_SECTOR_SIZE) (MBED_APP_SIZE - ADUCM_SECTOR_SIZE) {
        *(InRoot$$Sections)
        *(+RO)
    }

    RW_IRAM1    0x20040000 EMPTY 0 { }

    ADUCM_IRAM2 0x20000200 0x6E00  { *(+RW) }

    ADUCM_IRAM3 0x20048000 0x10000 { *(+ZI) }

    ARM_LIB_HEAP  AlignExpr(ImageLimit(RW_IRAM1), 16) EMPTY
        (ImageBase(ADUCM_IRAM3) - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } ; heap

    ARM_LIB_STACK AlignExpr(+0, 16) EMPTY Stack_Size { ; stack
    }
}