#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m4
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *****

#if !defined(MBED_APP_START)
  #define MBED_APP_START            0x08000000
#endif

#if !defined(MBED_APP_SIZE)
  #define MBED_APP_SIZE             0x100000
#endif

#if !defined(MBED_RAM_START)
  #define MBED_RAM_START            0x20000000
#endif

#if !defined(MBED_RAM_SIZE)
  #define MBED_RAM_SIZE             0x00018000
#endif

#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#  if defined(MBED_BOOT_STACK_SIZE)
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#  else
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#  endif
#endif


; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150)
#define VECTOR_SIZE                 0x150

#define Stack_Size                  MBED_CONF_TARGET_BOOT_STACK_SIZE

#define RAM_FIXED_SIZE              (Stack_Size+VECTOR_SIZE)

#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)

LR_IROM1 MBED_APP_START MBED_APP_SIZE  {    ; load region size_region (1024K)

  ER_IROM1 MBED_APP_START MBED_APP_SIZE  {  ; load address = execution address
   *.o (RESET, +First)
   *(InRoot$$Sections)
   .ANY (+RO)
  }

  ; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150)
  RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-RAM_FIXED_SIZE)  {  ; RW data
   .ANY (+RW +ZI)
  }

  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  { ; Heap region growing up
  }

  ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -Stack_Size { ; Stack region growing down
  }
}