<?xml version="1.0" encoding="utf-8"?>

<!--****************************************************************************
* \file ctbmclk.cypersonality
* \version 1.0
*
* \brief
* CTBm Pump Clock personality description file.
*
********************************************************************************
* \copyright
* Copyright 2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
*     http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*****************************************************************************-->

<Personality id="mxs40ctbmclk" name="CTBm Pump Clock" version="1.0" xmlns="http://cypress.com/xsd/cyhwpersonality_v3">
  <Dependencies>
    <IpBlock name="mxs40pass_ver2" />
    <Resource name="pass\.ctbmclk"/>
    <DependentResource name="pass.ctb.oa" />
  </Dependencies>
  <ExposedMembers>
    <ExposedMember key="frequency" paramId="frequency" />
    <ExposedMember key="accuracy"  paramId="accuracy" />
    <ExposedMember key="error"     paramId="error" />
    <ExposedMember key="clock"     paramId="clock" />
  </ExposedMembers>
  <Parameters>
    <!-- PDL documentation -->
    <ParamDoc id="pdlDoc" name="Configuration Help" group="Peripheral Documentation" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__ctb.html" linkText="Open CTB Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation" />
    
    <ParamBool id="debug" name="debug" group="Internal" default="true" visible="false" editable="false" desc="" />
    <ParamBool id="isClkPumpEnabled" name="Is Pump Clock Enabled" group="Internal" default="`${isBlockUsed(&quot;srss[0].clock[0].pumpclk[0]&quot;)}`" visible="false" editable="false" desc="Pump clock enabling state" />
    <ParamBool id="hasCTB" name="hasCTB" group="Internal" default="`${hasBlock(&quot;pass[0].ctb[0].oa[0]&quot;)}`" visible="false" editable="false" desc="Check whether device has CTBs" />

    <ParamChoice id="clock" name="Pump Clock Source" group="General" default="CY_CTB_CLK_PUMP_SRSS" visible="`${hasCTB}`" editable="true" desc="Select the clock source for the opamp pump clock." >
      <Entry name="CLK_PUMP" value="CY_CTB_CLK_PUMP_SRSS" visible="true" />
      <Entry name="Peri Clock Divider" value="CY_CTB_CLK_PUMP_PERI" visible="true" />
      <Entry name="Deep Sleep Clock" value="CY_CTB_CLK_PUMP_DEEPSLEEP" visible="true" />
    </ParamChoice>

    <ParamSignal name="Peri Clock" port="clock_pump_peri[0]" group="Global Opamp Settings" visible="`${clock eq CY_CTB_CLK_PUMP_PERI}`" desc="Peri divider clock for the pump clock." canBeEmpty="`${clock ne CY_CTB_CLK_PUMP_PERI}`" />
    
    <ParamString id="sourceClockRsc" name="sourceClockRsc" group="Internal" default="`${clock eq CY_CTB_CLK_PUMP_SRSS ? &quot;srss[0].clock[0].pumpclk[0]&quot; : clock eq CY_CTB_CLK_PUMP_DEEPSLEEP ? &quot;pass[0].dpslp[0]&quot; : getBlockFromSignal(&quot;clock_pump_peri[0]&quot;)}`" visible="false" editable="false" desc="" />
    <ParamBool id="error" name="Clock Error" group="Internal" default="`${!isBlockUsed(sourceClockRsc)}`" visible="false" editable="false" desc="" />
    <ParamRange id="frequency" name="Source Frequency" group="Internal" default="`${!error ? getExposedMember(sourceClockRsc, &quot;frequency&quot;) : 0}`" min="0" max="26400000" resolution="1" visible="false" editable="false" desc="" />
    <ParamString id="accuracy" name="accuracy" group="Internal" default="`${!error ? getExposedMember(sourceClockRsc, &quot;accuracy&quot;) : 0}`" visible="false" editable="false" desc="" />
    <ParamString id="sourceFrequencyInfo" name="Frequency" group="General" default="`${formatFrequency(frequency,accuracy)}`" visible="true" editable="false" desc="Source clock frequency" />
    
    <!-- Peripheral clock divider connection -->
    <ParamString id="pclk" name="pclk" group="Internal" default="`${getBlockFromSignal(&quot;clock_pump_peri[0]&quot;)}`" visible="false" editable="false" desc="Connected peripheral clock divider (PCLK)." />
    <ParamBool id="pclkOk" name="pclkOk" group="Internal" default="`${hasConnection(&quot;clock_pump_peri&quot;, 0) &amp;&amp; isBlockUsed(pclk)}`" visible="false" editable="false" desc="Checks whether there is a PCLK connected and enabled." />
    <ParamString id="pclkDst" name="pclkDst" group="Internal" default="PCLK_PASS_CLOCK_PUMP_PERI" visible="false" editable="false" desc="Generates PCLK connection define." />
  </Parameters>

  <DRCs>
    <DRC type="ERROR" text="Pump clock (CLK_PUMP) resource must be enabled when the Opamp Pump Clock Source is set to SRSS." condition="`${hasCTB &amp;&amp; !isClkPumpEnabled &amp;&amp; clock eq CY_CTB_CLK_PUMP_SRSS}`"  location="srss[0].clock[0].pumpclk[0]">
        <FixIt action="ENABLE_BLOCK" target="srss[0].clock[0].pumpclk[0]" value="mxs40pumpclk-1.0" valid="true" />
    </DRC>
  </DRCs>

  <ConfigFirmware>
      <ConfigInclude value="cy_ctb.h" include="true" />
      <ConfigInclude value="cy_sysclk.h" include="`${pclkOk}`" />
      <ConfigInstruction value="Cy_CTB_SetPumpClkSource(PASS, `${clock}`);" include="true" />
      <ConfigInstruction value="Cy_SysClk_PeriphAssignDivider(`${pclkDst}`, `${getExposedMember(pclk, &quot;clockSel&quot;)}`);" include="`${clock eq CY_CTB_CLK_PUMP_PERI &amp;&amp; pclkOk}`" />
  </ConfigFirmware>
</Personality>