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mbed-os / targets / TARGET_Cypress / TARGET_PSOC6 / mtb-pdl-cat1 / personalities / peripheral / dpslp-1.0.cypersonality
@Dustin Crossman Dustin Crossman on 4 Jun 2021 6 KB Fix file modes.
<?xml version="1.0" encoding="utf-8"?>

<!--****************************************************************************
* \file dpslp.cypersonality
* \version 1.0
*
* \brief
* Deep Sleep Clock personality description file.
*
********************************************************************************
* \copyright
* Copyright 2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
*     http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*****************************************************************************-->

<Personality id="mxs40dpslp" name="Deep Sleep Clock" version="1.0" xmlns="http://cypress.com/xsd/cyhwpersonality_v3">
  <Dependencies>
    <IpBlock name="mxs40pass_ver2" />
    <Resource name="pass\.dpslp"/>
    <!--DependentResource name="pass.sar" /-->
  </Dependencies>
  <ExposedMembers>
    <ExposedMember key="frequency" paramId="frequency" />
    <ExposedMember key="accuracy"  paramId="accuracy" />
    <ExposedMember key="error"     paramId="error" />
    <ExposedMember key="clock"     paramId="clock" />
  </ExposedMembers>
  <Parameters>
    <!-- PDL documentation -->
    <ParamDoc id="pdlDoc" name="Configuration Help" group="Peripheral Documentation" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__sysanalog.html" linkText="Open SysAnalog Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation" />

    <ParamChoice id="clock" name="Clock Source" group="General" default="CY_SYSANALOG_DEEPSLEEP_SRC_LPOSC" visible="true" editable="true" desc="Select the clock source for the opamp pump clock." >
      <Entry name="LPOSC" value="CY_SYSANALOG_DEEPSLEEP_SRC_LPOSC" visible="true" />
      <Entry name="CLK_MF" value="CY_SYSANALOG_DEEPSLEEP_SRC_CLK_MF" visible="true" />
    </ParamChoice>
    
    <ParamString id="sourceClockRsc" name="sourceClockRsc" group="Internal" default="`${clock eq CY_SYSANALOG_DEEPSLEEP_SRC_CLK_MF ? &quot;srss[0].clock[0].mfclk[0]&quot; : &quot;pass[0].lposc[0]&quot;}`" visible="false" editable="false" desc="" />
    <ParamBool id="error" name="Clock Error" group="Internal" default="`${!isBlockUsed(sourceClockRsc)}`" visible="false" editable="false" desc="" />
    <ParamRange id="sourceFreq" name="Source Frequency" group="Internal" default="`${!error ? getExposedMember(sourceClockRsc, &quot;frequency&quot;) : 0}`" min="0" max="8000000" resolution="1" visible="false" editable="false" desc="" />
    <ParamString id="accuracy" name="accuracy" group="Internal" default="`${!error ? getExposedMember(sourceClockRsc, &quot;accuracy&quot;) : 0}`" visible="false" editable="false" desc="" />
    <ParamString id="sourceFrequencyInfo" name="Source Frequency" group="General" default="`${formatFrequency(sourceFreq,accuracy)}`" visible="true" editable="false" desc="Source clock frequency" />
    
    <ParamChoice id="dsclkdiv" name="Clock Divider" group="General" default="CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_4" visible="true" editable="true" desc="Select the clock source for the opamp pump clock." >
      <Entry name="1" value="CY_SYSANALOG_DEEPSLEEP_CLK_NO_DIV" visible="`${clock eq CY_SYSANALOG_DEEPSLEEP_SRC_CLK_MF}`"/>
      <Entry name="2" value="CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_2" visible="`${clock eq CY_SYSANALOG_DEEPSLEEP_SRC_CLK_MF}`"/>
      <Entry name="4" value="CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_4" visible="true"/>
      <Entry name="8" value="CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_8" visible="true"/>
      <Entry name="16" value="CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_16" visible="true"/>
    </ParamChoice>
    
    <ParamRange id="divider" name="divider" group="Internal" default="`${dsclkdiv eq CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_2  ? 2  : 
                                                                         dsclkdiv eq CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_4  ? 4  : 
                                                                         dsclkdiv eq CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_8  ? 8  : 
                                                                         dsclkdiv eq CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_16 ? 16 : 1}`" min="1" max="16" resolution="1" visible="false" editable="false" desc="Sets divider value for the Deep Sleep clock source" />
    <ParamRange id="frequency" name="Frequency" group="Internal" default="`${sourceFreq / divider}`" min="0" max="8000000" resolution="1" visible="false" editable="false" desc="" />
    <ParamString id="frequencyInfo" name="Frequency" group="General" default="`${formatFrequency(frequency,accuracy)}`" visible="true" editable="false" desc="The resulting Deep Sleep Clock frequency" />

    <ParamString id="mfoRcs" name="mfoRcs" group="Internal" default="srss[0].clock[0].mfo[0]" visible="false" editable="false" desc="" />

  </Parameters>

  <DRCs>
    <DRC type="ERROR" text="Source clock for Deep Sleep Clock is not enabled" condition="`${error}`" >
      <FixIt action="ENABLE_BLOCK" target="`${sourceClockRsc}`" value="" valid="true" />
    </DRC>

    <DRC type="ERROR" text="MFO Deep Sleep support should be enabled" condition="`${(clock eq &quot;CY_SYSANALOG_DEEPSLEEP_SRC_CLK_MF&quot;) ? ((isBlockUsed(mfoRcs)) ? (!getExposedMember(mfoRcs, &quot;dsen&quot;)) : false) : (false)}`" >
    </DRC>
    
    <DRC type="ERROR" text="The Deep Sleep Clock frequency should not be greater than 2 MHz" condition="`${frequency &gt; 2000000}`" >
      <FixIt action="SET_PARAM" target="dsclkdiv" value="CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_4" valid="true" />
    </DRC>
  </DRCs>

  <ConfigFirmware>
    <ConfigInclude value="cy_sysanalog.h" include="true" />
    <ConfigDefine name="CY_CFG_SYSANALOG_DEEPSLEEP_SRC" value="`${clock}`" public="true" include="true" />
    <ConfigDefine name="CY_CFG_SYSANALOG_DEEPSLEEP_DIV" value="`${dsclkdiv}`" public="true" include="true" />
  </ConfigFirmware>
</Personality>