<?xml version="1.0" encoding="utf-8"?> <!--**************************************************************************** * \file debug.cypersonality * \version 1.0 * * \brief * Debug Access personality description file. * ******************************************************************************** * \copyright * Copyright 2018-2019 Cypress Semiconductor Corporation * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. *****************************************************************************--> <Personality id="mxs40dap" name="Debug Access" version="1.0" path="Debug" xmlns="http://cypress.com/xsd/cyhwpersonality_v1"> <Dependencies> <IpBlock name="m4cpuss,m4cpuss_ver2" /> <Resource name="cpuss\.dap" used="true" /> </Dependencies> <ExposedMembers /> <Parameters> <ParamChoice id="dbgMode" name="Debug Mode" group="General" default="SWD" visible="true" editable="true" desc="Controls what pins need to be reserved for debugging."> <Entry name="None" value="NONE" visible="true" /> <Entry name="SWD" value="SWD" visible="true" /> <Entry name="JTAG" value="JTAG" visible="true" /> </ParamChoice> <ParamBool id="traceClock" name="traceClock" group="General" default="`${hasVisibleOption("trace_clock[0]")}`" visible="false" editable="false" desc="" /> <ParamBool id="traceEnable" name="Enable ETM" group="General" default="false" visible="`${traceClock}`" editable="true" desc="Enables the Cortex ETM Trace capability for outputting real-time debug information while the processor is running." /> <ParamString id="dbgGroup" name="dbgGroup" group="Internal" default="`${dbgMode eq SWD ? "SWD" : "JTAG"}` Pins" visible="false" editable="false" desc="" /> <ParamSignal port="swj_swdio_tms[0]" name="`${dbgMode eq SWD ? "SWDIO" : "TMS"}`" group="`${dbgGroup}`" visible="`${dbgMode ne NONE}`" desc="Reserve the pin for `${dbgMode eq SWD ? "Single Wire Data In/Out" : "Test Mode Select"}`" canBeEmpty="`${dbgMode eq NONE}`"> <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > <Parameter id="DriveModes" severity="ERROR" reason="Drive Mode must be set to 'Resistive Pull-Up. Input buffer on'."> <Fixed value="CY_GPIO_DM_PULLUP" /> </Parameter> </Constraint> <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> </ParamSignal> <ParamSignal port="swj_swclk_tclk[0]" name="`${dbgMode eq SWD ? "SWCLK" : "TCLK"}`" group="`${dbgGroup}`" visible="`${dbgMode ne NONE}`" desc="Reserve the pin for `${dbgMode eq SWD ? "Single Wire Clock" : "Test Clock"}`" canBeEmpty="`${dbgMode eq NONE}`"> <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > <Parameter id="DriveModes" severity="ERROR" reason="Drive Mode must be set to 'Resistive Pull-Down. Input buffer on'."> <Fixed value="CY_GPIO_DM_PULLDOWN" /> </Parameter> </Constraint> <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> </ParamSignal> <ParamSignal port="swj_swo_tdo[0]" name="`${dbgMode eq SWD ? "SWO" : "TDO"}`" group="`${dbgGroup}`" visible="`${dbgMode ne NONE}`" desc="Reserve the pin for `${dbgMode eq SWD ? "Single Wire Output" : "Test Data Output"}`" canBeEmpty="`${dbgMode ne JTAG}`"> <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > <Parameter id="DriveModes" severity="ERROR" reason="Drive Mode must be set to 'Strong Drive. Input buffer off'."> <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> </Parameter> </Constraint> <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> </ParamSignal> <ParamSignal port="swj_swdoe_tdi[0]" name="TDI" group="`${dbgGroup}`" visible="`${dbgMode eq JTAG}`" desc="Reserve pin for Test Data Input" canBeEmpty="`${dbgMode ne JTAG}`"> <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > <Parameter id="DriveModes" severity="ERROR" reason="Drive Mode must be set to 'Strong Drive. Input buffer off'."> <Fixed value="CY_GPIO_DM_PULLUP" /> </Parameter> </Constraint> <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> </ParamSignal> <ParamSignal port="swj_trstn[0]" name="TRSTn" group="`${dbgGroup}`" visible="`${dbgMode eq JTAG}`" desc="Reserve pin for Test Reset" canBeEmpty="true"> <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > <Parameter id="DriveModes" severity="ERROR" reason="Drive Mode must be set to 'Resistive Pull-Up. Input buffer on'."> <Fixed value="CY_GPIO_DM_PULLUP" /> </Parameter> </Constraint> <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> </ParamSignal> <ParamSignal port="trace_clock[0]" name="Clock" group="Trace Pins" visible="`${traceEnable && traceClock}`" desc="Clock pin for the Cortex ETM Trace." canBeEmpty="true"> <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > <Parameter id="DriveModes" severity="ERROR" reason="Drive Mode must be set to 'Strong Drive. Input buffer off'."> <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> </Parameter> </Constraint> <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> </ParamSignal> <Repeat count="64"> <ParamSignal port="trace_data[$idx]" name="Data[$idx]" group="Trace Pins" visible="`${traceEnable && traceClock && $idx < TPIU_WIDTH}`" desc="Data[$idx] pin for the Cortex ETM Trace." canBeEmpty="true"> <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > <Parameter id="DriveModes" severity="ERROR" reason="Drive Mode must be set to 'Strong Drive. Input buffer off'."> <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> </Parameter> </Constraint> <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> </ParamSignal> </Repeat> </Parameters> <DRCs /> <ConfigFirmware /> </Personality>