<?xml version="1.0" encoding="utf-8"?>


<!--****************************************************************************
* \file extclk.cypersonality
* \version 1.1
*
* \brief
* EXTCLK personality description file.
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
*     http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*****************************************************************************-->

<Personality id="mxs40extclk" name="EXTCLK" version="1.1" path="Clocks/Fast" xmlns="http://cypress.com/xsd/cyhwpersonality_v1">
  <Dependencies>
    <IpBlock name="mxs40srss" />
    <IpBlock name="mxs40ioss" />
    <Resource name="srss\.clock\.ext" used="true" />
  </Dependencies>
  <ExposedMembers>
    <ExposedMember key="frequency" paramId="frequency" />
    <ExposedMember key="accuracy"  paramId="accuracyPct" />
  </ExposedMembers>
  <Parameters>
    <!-- PDL documentation -->
    <ParamDoc id="pdlDoc" name="Configuration Help" group="Peripheral Documentation" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__sysclk.html" linkText="Open System Clock Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation" />
  
    <ParamBool id="usingUlp" name="usingUlp" group="Internal" default="`${isBlockUsed(&quot;srss[0].power[0]&quot;) &amp;&amp; getExposedMember(&quot;srss[0].power[0]&quot;, &quot;usingUlp&quot;)}`" visible="false" editable="false" desc="" />
    <ParamString id="maxFrequency" name="Max Frequency (MHz)" group="Internal" default="`${getDeviceAttr(&quot;CPU_MAX_MHZ&quot;) &gt; 100 ? 100 : getDeviceAttr(&quot;CPU_MAX_MHZ&quot;)}`" visible="false" editable="false" desc="The maximum EXTCLK frequency" />

    <ParamRange id="extFrequency" name="Frequency (MHz)" group="General" default="24.000" min="1" max="`${maxFrequency}`" resolution="0.001" visible="true" editable="true" desc="" />
    <ParamRange id="frequency" name="Frequency" group="Internal" default="`${extFrequency * 1000000}`" visible="false" editable="false" min="1000000" max="100000000" resolution="1" desc="" />
    <ParamRange id="accuracyPpm" name="Accuracy (&#177;ppm)" group="General" default="0" min="0" max="1000000" resolution="1" visible="true" editable="true" desc="Clock accuracy in ppm" />
    <ParamString id="accuracyPct" name="Accuracy (&#177;%)" group="General" default="`${accuracyPpm/10000.0}`" visible="true" editable="false" desc="Clock accuracy in %" />
 
    <ParamSignal port="ext_clk[0]" name="Pin" group="Connections" visible="true" desc="The input terminal to connect the external clock signal" canBeEmpty="false" />
    
    <ParamString id="gpio_port" name="gpio_port" group="Internal" default="`${getInstFromLocation(getParamValue(&quot;ext_clk[0]&quot;), &quot;port&quot;)}`" visible="false" editable="false" desc="" />
    <ParamString id="gpio_pin" name="gpio_pin" group="Internal" default="`${getInstFromLocation(getParamValue(&quot;ext_clk[0]&quot;), &quot;pin&quot;)}`" visible="false" editable="false" desc="" />
  </Parameters>
  <DRCs>
    <!-- For ULP mode, Fextclk_max = 50 MHz. For LP mode, Fextclk_max = 100 MHz or Fcpu_max (if Fcpu_max < 100 MHz) -->
    <DRC type="ERROR" text="The EXTCLK frequency `${extFrequency}` MHz is higher than the maximum operating frequency `${maxFrequency}` MHz of the device" condition="`${!usingUlp &amp;&amp; extFrequency &gt; maxFrequency}`" paramId="extFrequency" />
    <DRC type="ERROR" text="The EXTCLK frequency `${extFrequency}` MHz exceeds the maximum of 50 MHz when the ULP mode is used" condition="`${usingUlp &amp;&amp; extFrequency &gt; 50}`" paramId="extFrequency" />
  </DRCs>
  <ConfigFirmware>
    <ConfigInclude value="cy_gpio.h" include="true" />
    <ConfigDefine name="CY_CFG_SYSCLK_EXTCLK_ENABLED" value="1" public="false" include="true" />
    <ConfigDefine name="CY_CFG_SYSCLK_EXTCLK_FREQ" value="`${frequency}`UL" public="false" include="true" />
    <ConfigDefine name="CY_CFG_SYSCLK_EXTCLK_GPIO_PRT" value="GPIO_PRT`${gpio_port}`" public="false" include="true" />
    <ConfigDefine name="CY_CFG_SYSCLK_EXTCLK_GPIO_PIN" value="`${gpio_pin}`" public="false" include="true" />
    <ConfigDefine name="CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM" value="P`${gpio_port}`_`${gpio_pin}`_SRSS_EXT_CLK" public="false" include="true" />
    <ConfigFunction signature="__STATIC_INLINE void Cy_SysClk_ExtClkInit()" body="    (void)Cy_GPIO_Pin_FastInit(GPIO_PRT`${gpio_port}`, `${gpio_pin}`, CY_GPIO_DM_HIGHZ, 0UL, P`${gpio_port}`_`${gpio_pin}`_SRSS_EXT_CLK);&#xA;    Cy_SysClk_ExtClkSetFrequency(CY_CFG_SYSCLK_EXTCLK_FREQ);" public="false" include="true" guard="((!CY_CPU_CORTEX_M4) || (!defined(CY_DEVICE_SECURE)))" />
  </ConfigFirmware>
</Personality>