<?xml version="1.0" encoding="utf-8"?> <!--**************************************************************************** * \file lfclk.cypersonality * \version 1.1 * * \brief * CLK_LF personality description file. * ******************************************************************************** * \copyright * Copyright 2019-2019 Cypress Semiconductor Corporation * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. *****************************************************************************--> <Personality id="mxs40lfclk" name="CLK_LF" version="1.1" path="Clocks/Slow" xmlns="http://cypress.com/xsd/cyhwpersonality_v1"> <Dependencies> <IpBlock name="mxs40srss" /> <Resource name="srss\.clock\.lfclk" used="true" /> </Dependencies> <ExposedMembers> <ExposedMember key="frequency" paramId="frequency" /> <ExposedMember key="accuracy" paramId="accuracy" /> <ExposedMember key="error" paramId="error" /> </ExposedMembers> <Parameters> <!-- PDL documentation --> <ParamDoc id="pdlDoc" name="Configuration Help" group="Peripheral Documentation" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__sysclk__clk__lf.html" linkText="Open Low-Frequency Clock Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation" /> <ParamChoice id="sourceClock" name="Source Clock" group="General" default="ilo" visible="true" editable="true" desc="The clock source for CLK_LF"> <Entry name="ALTLF" value="altlf" visible="`${ALTLF_PRESENT}`"/> <Entry name="ILO" value="ilo" visible="true"/> <Entry name="PILO" value="pilo" visible="`${PILO_PRESENT}`"/> <Entry name="WCO" value="wco" visible="`${BACKUP_PRESENT}`"/> </ParamChoice> <ParamString id="sourceClockRsc" name="Source Clock" group="Internal" default="`${"srss[0].clock[0]." . sourceClock . "[0]"}`" visible="false" editable="false" desc="" /> <ParamString id="sourceClockApiName" name="Source Clock API Name" group="Internal" default="`${sourceClock eq ilo ? "ILO" : sourceClock eq wco ? "WCO" : sourceClock eq altlf ? "ALTLF" : "PILO"}`" visible="false" editable="false" desc="" /> <!-- Set an error if the source clock is not enabled --> <ParamBool id="error" name="Clock Error" group="Internal" default="`${!isBlockUsed(sourceClockRsc)}`" visible="false" editable="false" desc="" /> <ParamRange id="frequency" name="Frequency" group="Internal" default="`${!error ? getExposedMember(sourceClockRsc, "frequency") : 0}`" min="0" max="100000" resolution="1" visible="false" editable="false" desc="" /> <ParamString id="accuracy" name="accuracy" group="General" default="`${!error ? getExposedMember(sourceClockRsc, "accuracy") : 0}`" visible="false" editable="false" desc="" /> <ParamString id="frequencyInfo" name="Frequency" group="General" default="`${formatFrequency(frequency,accuracy)}`" visible="true" editable="false" desc="The CLK_LF frequency provided by the chosen clock source" /> </Parameters> <DRCs> <DRC type="ERROR" text="Source clock for CLK_LF is not enabled" condition="`${error}`" > <FixIt action="ENABLE_BLOCK" target="`${sourceClockRsc}`" value="" valid="true" /> </DRC> </DRCs> <ConfigFirmware> <ConfigInclude value="cy_sysclk.h" include="true" /> <ConfigDefine name="CY_CFG_SYSCLK_CLKLF_ENABLED" value="1" public="false" include="true" /> <ConfigDefine name="CY_CFG_SYSCLK_CLKLF_FREQ_HZ" value="`${frequency}`" public="true" include="true" /> <ConfigDefine name="CY_CFG_SYSCLK_CLKLF_SOURCE" value="CY_SYSCLK_CLKLF_IN_`${sourceClockApiName}`" public="true" include="true" /> <ConfigFunction signature="__STATIC_INLINE void Cy_SysClk_ClkLfInit()" body=" /* The WDT is unlocked in the default startup code */
 Cy_SysClk_ClkLfSetSource(CY_SYSCLK_CLKLF_IN_`${sourceClockApiName}`);" public="false" include="true" guard="((!CY_CPU_CORTEX_M4) || (!defined(CY_DEVICE_SECURE)))" /> </ConfigFirmware> </Personality>