<?xml version="1.0" encoding="utf-8"?>


<!--****************************************************************************
* \file mfclk.cypersonality
* \version 1.0
*
* \brief
* CLK_MF personality description file.
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
*     http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*****************************************************************************-->

<Personality id="mxs40mfclk" name="CLK_MF" version="1.0" path="Clocks/Medium" xmlns="http://cypress.com/xsd/cyhwpersonality_v1">
  <Dependencies>
    <IpBlock name="mxs40srss" />
    <Resource name="srss\.clock\.mfclk" used="true" />
  </Dependencies>
  <ExposedMembers>
    <ExposedMember key="frequency" paramId="frequency" />
    <ExposedMember key="accuracy"  paramId="accuracy" />
    <ExposedMember key="error"     paramId="error" />
  </ExposedMembers>
  <Parameters>
    <!-- PDL documentation -->
    <ParamDoc id="pdlDoc" name="Configuration Help" group="Peripheral Documentation" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__sysclk.html" linkText="Open SysClk Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation" />
    
    <ParamString id="sourceClockRsc" name="Source Clock" group="Internal" default="srss[0].clock[0].mfo[0]" visible="false" editable="false" desc="" />
    <ParamBool id="error" name="Clock Error" group="Internal" default="`${!isBlockUsed(sourceClockRsc)}`" visible="false" editable="false" desc="" />
    <ParamRange id="sourceFreq" name="Source Frequency" group="Internal" default="`${!error ? getExposedMember(sourceClockRsc, &quot;frequency&quot;) : 0}`" min="0" max="2000000" resolution="1" visible="false" editable="false" desc="" />
    <ParamString id="accuracy" name="accuracy" group="Internal" default="`${!error ? getExposedMember(sourceClockRsc, &quot;accuracy&quot;) : 0}`" visible="false" editable="false" desc="" />
    <ParamString id="sourceFrequencyInfo" name="Source Frequency" group="General" default="`${formatFrequency(sourceFreq,accuracy)}`" visible="true" editable="false" desc="Source clock frequency" />
    <ParamRange id="divider" name="Divider" group="General" default="1" min="1" max="256" resolution="1" visible="true" editable="true" desc="The source clock frequency divider" />
    <ParamRange id="frequency" name="Frequency" group="Internal" default="`${sourceFreq / divider}`" min="0" max="2000000" resolution="1" visible="false" editable="false" desc="" />
    <ParamString id="frequencyInfo" name="Frequency" group="General" default="`${formatFrequency(frequency,accuracy)}`" visible="true" editable="false" desc="The resulting CLK_MF output clock frequency" />
    <ParamSignal port="clk_mf[0]" name="Clock Output" group="General" visible="true" desc="A medium-frequency clock output driving specific periperals" canBeEmpty="true" />
  </Parameters>
  <DRCs>
    <DRC type="ERROR" text="Source clock for CLK_MF is not enabled" condition="`${error}`" >
      <FixIt action="ENABLE_BLOCK" target="`${sourceClockRsc}`" value="" valid="true" />
    </DRC>
  </DRCs>
  <ConfigFirmware>
    <ConfigInclude value="cy_sysclk.h" include="true" />
    <ConfigDefine name="CY_CFG_SYSCLK_CLKMF_ENABLED" value="1" public="false" include="true" />
    <ConfigDefine name="CY_CFG_SYSCLK_CLKMF_FREQ" value="`${frequency}`UL" public="false" include="true" />
    <ConfigDefine name="CY_CFG_SYSCLK_CLKMF_DIVIDER" value="`${divider}`UL" public="false" include="true" />
    <ConfigFunction signature="__STATIC_INLINE void Cy_SysClk_ClkMfInit()" body="    Cy_SysClk_ClkMfDisable();&#xA;    Cy_SysClk_ClkMfSetDivider(CY_CFG_SYSCLK_CLKMF_DIVIDER);&#xA;    Cy_SysClk_ClkMfEnable();" public="false" include="true" />
  </ConfigFirmware>
</Personality>