<?xml version="1.0" encoding="utf-8"?> <!--**************************************************************************** * \file periclk.cypersonality * \version 1.0 * * \brief * CLK_PERI personality description file. * ******************************************************************************** * \copyright * Copyright 2018-2019 Cypress Semiconductor Corporation * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. *****************************************************************************--> <Personality id="mxs40periclk" name="CLK_PERI" version="1.0" path="Clocks/Fast" xmlns="http://cypress.com/xsd/cyhwpersonality_v1"> <Dependencies> <IpBlock name="mxs40srss" /> <Resource name="srss\.clock\.periclk" used="true" /> </Dependencies> <ExposedMembers> <ExposedMember key="frequency" paramId="frequency" /> <ExposedMember key="accuracy" paramId="accuracy" /> <ExposedMember key="error" paramId="error" /> </ExposedMembers> <Parameters> <!-- PDL documentation --> <ParamDoc id="pdlDoc" name="Configuration Help" group="Peripheral Documentation" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__sysclk__clk__peri.html" linkText="Open Peripherals Clock Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation" /> <ParamString id="sourceClockRsc" name="Source Clock" group="Internal" default="srss[0].clock[0].hfclk[0]" visible="false" editable="false" desc="" /> <!-- Set an error if the source clock is not enabled --> <ParamBool id="srcNotUsed" name="Clock Source Enabled" group="Internal" default="`${!isBlockUsed(sourceClockRsc)}`" visible="false" editable="false" desc="" /> <ParamBool id="error" name="Clock Error" group="Internal" default="`${srcNotUsed || getExposedMember(sourceClockRsc, "error")}`" visible="false" editable="false" desc="" /> <!-- Use default values in case of error --> <ParamRange id="sourceFreq" name="sourceFrequency" group="Internal" default="`${!error ? getExposedMember(sourceClockRsc, "frequency") : 0}`" min="0" max="150000000" resolution="1" visible="false" editable="false" desc="" /> <ParamString id="accuracy" name="Accuracy" group="Internal" default="`${!error ? getExposedMember(sourceClockRsc, "accuracy") : 0}`" visible="false" editable="false" desc="" /> <ParamString id="sourceFrequencyInfo" name="Source Clock" group="General" default="CLK_HF0 (`${formatFrequency(sourceFreq,accuracy)}`)" visible="true" editable="false" desc="Source clock frequency" /> <ParamRange id="divider" name="Divider" group="General" default="2" min="1" max="256" resolution="1" visible="true" editable="true" desc="" /> <ParamRange id="frequency" name="Frequency" group="Internal" default="`${sourceFreq / divider}`" min="0" max="`${sourceFreq}`" resolution="1" visible="false" editable="false" desc="" /> <!-- If the frequency is less than one MHz display its value in kHz --> <ParamString id="frequencyInfo" name="Frequency" group="General" default="`${formatFrequency(frequency,accuracy)}`" visible="true" editable="false" desc="The resulting CLK_PERI output clock frequency" /> <ParamBool id="usingUlp" name="usingUlp" group="Internal" default="`${isBlockUsed("srss[0].power[0]") && getExposedMember("srss[0].power[0]", "usingUlp")}`" visible="false" editable="false" desc="" /> </Parameters> <DRCs> <DRC type="ERROR" text="Source clock for CLK_PERI is not enabled" condition="`${srcNotUsed}`" > <FixIt action="ENABLE_BLOCK" target="`${sourceClockRsc}`" value="" valid="true" /> </DRC> <DRC type="ERROR" text="CLK_PERI `${frequencyInfo}` is faster than legal maximum 100 MHz" condition="`${!usingUlp && frequency > 100000000}`" paramId="frequencyInfo" /> <DRC type="ERROR" text="CLK_PERI `${frequencyInfo}` exceeds the maximum of 25 MHz when the ULP mode is used" condition="`${usingUlp && frequency > 25000000}`" paramId="frequencyInfo" /> </DRCs> <ConfigFirmware> <ConfigInclude value="cy_sysclk.h" include="true" /> <ConfigDefine name="CY_CFG_SYSCLK_CLKPERI_ENABLED" value="1" public="false" include="true" /> <ConfigDefine name="CY_CFG_SYSCLK_CLKPERI_DIVIDER" value="`${divider - 1}`" public="false" include="true" /> <ConfigFunction signature="__STATIC_INLINE void Cy_SysClk_ClkPeriInit()" body=" Cy_SysClk_ClkPeriSetDivider(`${divider - 1}`U);" public="false" include="true" guard="((!CY_CPU_CORTEX_M4) || (!defined(CY_DEVICE_SECURE)))" /> </ConfigFirmware> </Personality>