Tegra: allow individual SoCs to restore their settings

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LuminaSensum / arm-trusted-firmware

Browse code Tegra: allow individual SoCs to restore their settings This patch uses the Memory controller driver's handler to restore its settings and moves the other chip specific code to their own 'pwr_domain_on_finish' handlers. Change-Id: I3c9d23bdab9e2e3c05034ff6812cf941ccd7a75e Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> WIP_v2.3-LS master v2.2-LS v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3 v2.2-rc2 v2.2-rc1 v2.2-rc0 v2.2 v2.1-rc1 v2.1-rc0 v2.1 v2.0-rc0 v2.0 v1.6-rc1 v1.6-rc0 v1.6 v1.5-rc3 v1.5-rc2 v1.5-rc1 v1.5-rc0 v1.5 v1.4-rc0 v1.4
1 parent 9f1c5dd commit 102e4087935c454e0168cec7e9925b1e03be8325 Varun Wadekar authored on 3 Mar 2016

Browse code

This patch uses the Memory controller driver's handler to restore
its settings and moves the other chip specific code to their own
'pwr_domain_on_finish' handlers.

Change-Id: I3c9d23bdab9e2e3c05034ff6812cf941ccd7a75e
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

WIP_v2.3-LS master v2.2-LS v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3 v2.2-rc2 v2.2-rc1 v2.2-rc0 v2.2 v2.1-rc1 v2.1-rc0 v2.1 v2.0-rc0 v2.0 v1.6-rc1 v1.6-rc0 v1.6 v1.5-rc3 v1.5-rc2 v1.5-rc1 v1.5-rc0 v1.5 v1.4-rc0 v1.4

1 parent 9f1c5dd commit 102e4087935c454e0168cec7e9925b1e03be8325

Varun Wadekar authored on 3 Mar 2016

Patch

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Ignore Space Show notes View plat/nvidia/tegra/common/drivers/memctrl/memctrl_v1.c

Ignore Space Show notes View plat/nvidia/tegra/common/tegra_pm.c

Ignore Space Show notes View plat/nvidia/tegra/include/drivers/memctrl.h

Ignore Space Show notes View plat/nvidia/tegra/soc/t132/plat_psci_handlers.c

Ignore Space Show notes View plat/nvidia/tegra/soc/t210/plat_psci_handlers.c

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