qemu: fix holding pen mailbox sequence
Before this change, plat_secondary_cold_boot_setup reads wake up mailbox
as a byte array but through 64bit accesses on unaligned 64bit addresses.
In the other hand qemu_pwr_domain_on wakes secondary cores by writing
into a 64bit array.

This change forces the 64bit mailbox format as PLAT_QEMU_HOLD_ENTRY_SIZE
explicitly specifies it.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
1 parent 3b39efa commit 33dd33f8f0ce347209adae1044291e037ab2a0e1
@Etienne Carriere Etienne Carriere authored on 23 Oct 2017
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plat/qemu/aarch64/plat_helpers.S
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plat/qemu/include/platform_def.h