Neoverse N1: Forces cacheable atomic to near

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LuminaSensum / arm-trusted-firmware

Browse code Neoverse N1: Forces cacheable atomic to near This patch forces all cacheable atomic instructions to be near, which improves performance in highly contended parallelized use-cases. Change-Id: I93fac62847f4af8d5eaaf3b52318c30893e947d3 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com> WIP_v2.3-LS master v2.2-LS v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3 v2.2-rc2 v2.2-rc1 v2.2-rc0 v2.2
1 parent 0e985d7 commit 632ab3eb26fcef5561cc3d0314886fd9b2793c1f Louis Mayencourt authored on 18 Apr 2019

Browse code

This patch forces all cacheable atomic instructions to be near, which
improves performance in highly contended parallelized use-cases.

Change-Id: I93fac62847f4af8d5eaaf3b52318c30893e947d3
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>

WIP_v2.3-LS master v2.2-LS v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3 v2.2-rc2 v2.2-rc1 v2.2-rc0 v2.2

1 parent 0e985d7 commit 632ab3eb26fcef5561cc3d0314886fd9b2793c1f

Louis Mayencourt authored on 18 Apr 2019

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