Tegra: relocate code to BL31_BASE during cold boot

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LuminaSensum / arm-trusted-firmware

Browse code Tegra: relocate code to BL31_BASE during cold boot This patch adds support to relocate BL3-1 code to BL31_BASE in case we cold boot to a different address. This is particularly useful to maintain compatibility with legacy BL2 code. This patch also checks to see if the image base address matches either the TZDRAM or TZSRAM base. Change-Id: I72c96d7f89076701a6ac2537d4c06565c54dab9c Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> WIP_v2.3-LS master v2.2-LS v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3 v2.2-rc2 v2.2-rc1 v2.2-rc0 v2.2 v2.1-rc1 v2.1-rc0 v2.1 v2.0-rc0 v2.0 v1.6-rc1 v1.6-rc0 v1.6 v1.5-rc3 v1.5-rc2 v1.5-rc1 v1.5-rc0 v1.5 v1.4-rc0 v1.4
1 parent 1a9c383 commit 939dcf25e10639516f022fe67feebaa1d74d1678 Varun Wadekar authored on 24 Mar 2016

Browse code

This patch adds support to relocate BL3-1 code to BL31_BASE in case
we cold boot to a different address. This is particularly useful to
maintain compatibility with legacy BL2 code.

This patch also checks to see if the image base address matches either
the TZDRAM or TZSRAM base.

Change-Id: I72c96d7f89076701a6ac2537d4c06565c54dab9c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

WIP_v2.3-LS master v2.2-LS v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3 v2.2-rc2 v2.2-rc1 v2.2-rc0 v2.2 v2.1-rc1 v2.1-rc0 v2.1 v2.0-rc0 v2.0 v1.6-rc1 v1.6-rc0 v1.6 v1.5-rc3 v1.5-rc2 v1.5-rc1 v1.5-rc0 v1.5 v1.4-rc0 v1.4

1 parent 1a9c383 commit 939dcf25e10639516f022fe67feebaa1d74d1678

Varun Wadekar authored on 24 Mar 2016

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Ignore Space Show notes View plat/nvidia/tegra/common/aarch64/tegra_helpers.S

Ignore Space Show notes View plat/nvidia/tegra/common/tegra_bl31_setup.c

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