rockchip: rk3399: configure the DDR secure region for BL31 image

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LuminaSensum / arm-trusted-firmware

Browse code rockchip: rk3399: configure the DDR secure region for BL31 image Move the BL31 loaded base address 0x10000 to 0x1000, and configure the the memory range 0~1MB is secure, the goal is that make sure the BL31 image will be not modified. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> WIP_v2.3-LS master v2.2-LS v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3 v2.2-rc2 v2.2-rc1 v2.2-rc0 v2.2 v2.1-rc1 v2.1-rc0 v2.1 v2.0-rc0 v2.0 v1.6-rc1 v1.6-rc0 v1.6 v1.5-rc3 v1.5-rc2 v1.5-rc1 v1.5-rc0 v1.5 v1.4-rc0 v1.4
1 parent 1830f79 commit 941c71475e1b7a3ac41e61aac1ed5d3b7304b59b Xing Zheng authored on 24 Feb 2017

Browse code

Move the BL31 loaded base address 0x10000 to 0x1000, and configure
the the memory range 0~1MB is secure, the goal is that make sure
the BL31 image will be not modified.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

WIP_v2.3-LS master v2.2-LS v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3 v2.2-rc2 v2.2-rc1 v2.2-rc0 v2.2 v2.1-rc1 v2.1-rc0 v2.1 v2.0-rc0 v2.0 v1.6-rc1 v1.6-rc0 v1.6 v1.5-rc3 v1.5-rc2 v1.5-rc1 v1.5-rc0 v1.5 v1.4-rc0 v1.4

1 parent 1830f79 commit 941c71475e1b7a3ac41e61aac1ed5d3b7304b59b

Xing Zheng authored on 24 Feb 2017

Patch

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Ignore Space Show notes View plat/rockchip/rk3399/drivers/soc/soc.c

Ignore Space Show notes View plat/rockchip/rk3399/drivers/soc/soc.h

Ignore Space Show notes View plat/rockchip/rk3399/include/platform_def.h

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