Add CPU specific power management operations
This patch adds CPU core and cluster power down sequences to the CPU specific operations framework introduced in a earlier patch. Cortex-A53, Cortex-A57 and generic AEM sequences have been added. The latter is suitable for the Foundation and Base AEM FVPs. A pointer to each CPU's operations structure is saved in the per-cpu data so that it can be easily accessed during power down seqeunces. An optional platform API has been introduced to allow a platform to disable the Accelerator Coherency Port (ACP) during a cluster power down sequence. The weak definition of this function (plat_disable_acp()) does not take any action. It should be overriden with a strong definition if the ACP is present on a platform. Change-Id: I8d09bd40d2f528a28d2d3f19b77101178778685d
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Makefile |
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bl31/aarch64/bl31_entrypoint.S |
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docs/porting-guide.md |
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include/lib/aarch64/arch.h |
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include/lib/aarch64/arch_helpers.h |
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include/lib/aarch64/cpu_macros.S 100644 → 0 |
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include/lib/cpus/aarch64/aem_generic.h 0 → 100644 |
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include/lib/cpus/aarch64/cortex_a53.h 0 → 100644 |
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include/lib/cpus/aarch64/cortex_a57.h 0 → 100644 |
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include/lib/cpus/aarch64/cpu_macros.S 0 → 100644 |
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include/plat/common/plat_config.h |
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lib/cpus/aarch64/aem_generic.S |
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lib/cpus/aarch64/cortex_a53.S |
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lib/cpus/aarch64/cortex_a57.S |
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lib/cpus/aarch64/cpu_helpers.S |
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plat/common/aarch64/platform_helpers.S |
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plat/fvp/aarch64/fvp_common.c |
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plat/fvp/fvp_pm.c |
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services/std_svc/psci/psci_entry.S |
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services/std_svc/psci/psci_helpers.S |
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