Add cache topology info to FVP DTBs
From version 4.0 onwards, the ARM64 Linux kernel expects the device
tree to indicate the cache hierarchy. Failing to provide this
information results in the following warning message to be printed by
the kernel:

    `Unable to detect cache hierarchy from DT for CPU x`

All the FVP device trees provided in the TF source tree have been
modified to add this information.

Fixes ARM-software/tf-issues#325

Change-Id: I0ff888992e602b81a0fe1744a86151d625727511
1 parent 9931932 commit b1063d955bfed46de9e1bfdf58684f2da9837dcd
@Antonio Nino Diaz Antonio Nino Diaz authored on 22 Feb 2016
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fdts/fvp-base-gicv2-psci.dtb
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fdts/fvp-base-gicv2-psci.dts
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fdts/fvp-base-gicv2legacy-psci.dtb
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fdts/fvp-base-gicv2legacy-psci.dts
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fdts/fvp-base-gicv3-psci.dtb
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fdts/fvp-base-gicv3-psci.dts
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fdts/fvp-foundation-gicv2-psci.dtb
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fdts/fvp-foundation-gicv2-psci.dts
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fdts/fvp-foundation-gicv2legacy-psci.dtb
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fdts/fvp-foundation-gicv2legacy-psci.dts
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fdts/fvp-foundation-gicv3-psci.dtb
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fdts/fvp-foundation-gicv3-psci.dts