Optimize barrier usage during Cortex-A57 power down

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LuminaSensum / arm-trusted-firmware

Browse code Optimize barrier usage during Cortex-A57 power down This the patch replaces the DSB SY with DSB ISH after disabling L2 prefetches during the Cortex-A57 power down sequence. Change-Id: I048d12d830c1b974b161224eff079fb9f8ecf52d WIP_v2.3-LS master v2.2-LS v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3 v2.2-rc2 v2.2-rc1 v2.2-rc0 v2.2 v2.1-rc1 v2.1-rc0 v2.1 v2.0-rc0 v2.0 v1.6-rc1 v1.6-rc0 v1.6 v1.5-rc3 v1.5-rc2 v1.5-rc1 v1.5-rc0 v1.5 v1.4-rc0 v1.4 v1.3_rc2 v1.3_rc1 v1.3-rc0 v1.3 v1.2-rc0 v1.2 v1.1-rc3 v1.1-rc2 v1.1-rc1 v1.1-rc0 v1.1-Juno-0.1 v1.1
1 parent 7395a72 commit b1a9631d8110a2bcd458ec5809b50d5263a200ef Soby Mathew authored on 22 Sep 2014

Browse code

This the patch replaces the DSB SY with DSB ISH
after disabling L2 prefetches during the Cortex-A57
power down sequence.

Change-Id: I048d12d830c1b974b161224eff079fb9f8ecf52d

WIP_v2.3-LS master v2.2-LS v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3 v2.2-rc2 v2.2-rc1 v2.2-rc0 v2.2 v2.1-rc1 v2.1-rc0 v2.1 v2.0-rc0 v2.0 v1.6-rc1 v1.6-rc0 v1.6 v1.5-rc3 v1.5-rc2 v1.5-rc1 v1.5-rc0 v1.5 v1.4-rc0 v1.4 v1.3_rc2 v1.3_rc1 v1.3-rc0 v1.3 v1.2-rc0 v1.2 v1.1-rc3 v1.1-rc2 v1.1-rc1 v1.1-rc0 v1.1-Juno-0.1 v1.1

1 parent 7395a72 commit b1a9631d8110a2bcd458ec5809b50d5263a200ef

Soby Mathew authored on 22 Sep 2014

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