PL011: Fix a bug in the UART FIFO polling
Before attempting to write a character, the PL011 driver polls the PL011_UARTFR_TXFF bit to know whether the UART FIFO is full. However, the comparison with 1 was incorrect because PL011_UARTFR_TXFF is not at bit 0. This patch fixes it. Change-Id: If78892345bbdc8a5e4ae4a1b7159753c609681b0
WIP_v2.3-LS
master
v2.2-LS
v2.4-LS
v2.3-rc2
v2.3-rc1
v2.3-rc0
v2.3
v2.2-rc2
v2.2-rc1
v2.2-rc0
v2.2
v2.1-rc1
v2.1-rc0
v2.1
v2.0-rc0
v2.0
v1.6-rc1
v1.6-rc0
v1.6
v1.5-rc3
v1.5-rc2
v1.5-rc1
v1.5-rc0
v1.5
v1.4-rc0
v1.4
v1.3_rc2
v1.3_rc1
v1.3-rc0
v1.3
v1.2-rc0
v1.2
v1.1-rc3
v1.1-rc2
v1.1-rc1
v1.1-rc0
v1.1-Juno-0.1
v1.1
v1.0-rc0
v1.0
v0.4-Juno-0.6-rc1
|
---|
|
drivers/arm/pl011/pl011_console.c |
---|