Demonstrate model for routing IRQs to EL3
This patch provides an option to specify a interrupt routing model where non-secure interrupts (IRQs) are routed to EL3 instead of S-EL1. When such an interrupt occurs, the TSPD arranges a return to the normal world after saving any necessary context. The interrupt routing model to route IRQs to EL3 is enabled only during STD SMC processing. Thus the pre-emption of S-EL1 is disabled during Fast SMC and Secure Interrupt processing. A new build option TSPD_ROUTE_NS_INT_EL3 is introduced to change the non secure interrupt target execution level to EL3. Fixes ARM-software/tf-issues#225 Change-Id: Ia1e779fbbb6d627091e665c73fa6315637cfdd32
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bl31/interrupt_mgmt.c |
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docs/user-guide.md |
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include/bl31/interrupt_mgmt.h |
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services/spd/tspd/tspd.mk |
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services/spd/tspd/tspd_main.c |
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services/spd/tspd/tspd_pm.c |
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services/spd/tspd/tspd_private.h |
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