LuminaSensum/arm-trusted-firmware

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LuminaSensum / arm-trusted-firmware

2018-07-20	1083b2b Browse files » PSCI: Fix types of definitions ... Also change header guards to fix defects of MISRA C-2012 Rule 21.1. Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57 Acked-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 20 Jul 2018
	bef9a10 Browse files » PMF: Fix MISRA defects ... Fix instances of MISRA C-2012 Rule 10.1 and 21.1. Change-Id: I5676edede0703481e3635be0bc4a635df8e48f5e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 20 Jul 2018
	4829df8 Browse files » PSCI: Refactor lock macros to comply with MISRA ... Fix MISRA C-2012 Directive 4.9 defects. Change-Id: Ibd5364d8f138ddcf59c8074c32b35769366807dc Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 20 Jul 2018
	369742e Browse files » PSCI: Add missing function argument names ... Fix MISRA C-2012 Rules 8.2 and 21.1. Change-Id: I7f41fe76fe16399734d11847ab601ad8eb78df1a Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 20 Jul 2018
	97373c3 Browse files » PSCI: Replace macros by static inline functions ... Fix MISRA C-2012 Directive 4.9 and Rule 21.1 defects. Change-Id: I96c216317d38741ee632d2640cd7b36e6723d5c2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 20 Jul 2018
	f00119d Browse files » Fix check_[uptr/u32]_overflow() macros MISRA defects ... Add missing parentheses to fix MISRA C-2012 Rule 12.1. Also, the result of a comparison is an essentially boolean value, it isn't needed to return 1 or 0 depending on it. Also, fix header guards (MISRA C-2012 Rule 21.1). Change-Id: I90c0bcdeb2787c1ca659fc9a981808ece7958de3 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 20 Jul 2018
	029f5a2 Browse files » Introduce UL(), L() and LL() macros ... utils_def.h already has U() and ULL(), but not UL(), which is needed for types like uinptr_t and u_register_t. Also added L() and LL() for signed values. Change-Id: I0654df80d57149ff49507c52f1b27f3d500486a0 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 20 Jul 2018
2018-07-19	Unverified ba0248b Browse files » Merge pull request #1450 from MISL-EBU-System-SW/marvell-support-v6 ... Marvell support for Armada 8K SoC family danh-arm authored on 19 Jul 2018 GitHub committed on 19 Jul 2018
	Unverified 992a353 Browse files » Merge pull request #1483 from antonio-nino-diaz-arm/an/rpi3-psci ... rpi3: PSCI and Linux boot improvements danh-arm authored on 19 Jul 2018 GitHub committed on 19 Jul 2018
	Unverified 224e1ab Browse files » Merge pull request #1481 from antonio-nino-diaz-arm/an/xlat-refactor ... xlat: More refactoring danh-arm authored on 19 Jul 2018 GitHub committed on 19 Jul 2018
	Unverified e4686fd Browse files » Merge pull request #1449 from theopolis/hikey-tbb ... hikey: Add experimental TBB support danh-arm authored on 19 Jul 2018 GitHub committed on 19 Jul 2018
	Unverified 8ff0dfa Browse files » Merge pull request #1482 from sandrine-bailleux-arm/sb/fix-hcptr ... Misc arch.h fixes and cleanup danh-arm authored on 19 Jul 2018 GitHub committed on 19 Jul 2018
2018-07-18	23e0fe5 Browse files » make: support libraries in MAKE_BL macro ... Add support for BLx stages to use libraries in MAKE_BL macro. This change does not affect BL stages that do not have BL_LIBS variable defined in their makefiles. However in case that BL wants to use external library (for instance vendor-specific DDR initialization code supplied as a library), this patch will allow to build BL image linked with such library. Change-Id: Ife29069a72dc4aff833db6ef8b828736d6689b78 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	255f5c8 Browse files » io: Allow image load to address zero ... Remove assert on buffer address equal zero. Marvell uses address 0x0 for loading BL33, so this check is irrelevant and breaks the debug builds on Marvell platforms. Change-Id: Ie56a51138e2e4ddd8986dd7036797dc2d8b10125 Signed-off-by: Haim Boot <hayim@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/54589 Konstantin Porotchkin committed on 18 Jul 2018
	34ec7ec Browse files » plat: marvell: Add board support for A8K platform ... Add support for A8K platform boards Change-Id: Ife025d930d2ab6cabbc13bbe19b2273cc1c938c8 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	486f868 Browse files » plat: marvell: Add common ARMADA platform components ... Add common Marvell ARMADA platform components. This patch also includes common components for Marvell ARMADA 8K platforms. Change-Id: I42192fdc6525a42e46b3ac2ad63c83db9bcbfeaf Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	939e085 Browse files » docs: Add Marvell build and porting documents ... Change-Id: I341440701b7e5e3555e604dd9d0a356795e6c4fb Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	434e029 Browse files » tools: add support for Marvell doimage ... Add Marvell "doimage" utility support. The "doimage" utility allows to create flash images compatible with Marvell BootROM image format. Additionally this tool allows the flash image parsing and verification. Change-Id: Ie8d7ccd0cc2978684e7eecb695f375395fc749ee Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	f87e944 Browse files » marvell: drivers: Add i2c driver ... Add i2c driver for A8K SoC family. Change-Id: I5932b2fce286d84fc3ad5a74c4c456001faa3196 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	0ade8cd Browse files » mvebu: cp110: add COMPHY driver ... Add COMPHY driver for usage in a runtime service. Change-Id: I6fb42d0a099496d5699ee24684ae2b93ed35770b Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	d5a6f86 Browse files » marvell: drivers: Add thermal driver ... Add thermal driver for A8K SoC family. The termal unit data is used by Marvell DRAM initialization code for optimizing the memory controller configuration Change-Id: Iad92689fa6e4224a89d872e9aa015393abd9cf73 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	152b0e4 Browse files » marvell: drivers: Add L3/system cache management drivers ... Add LLC (L3) cache management drivers for Marvell SoCs AP806, AP807 and AP810 Change-Id: Ic70710f9bc5b6b48395d62212df7011e2fbb5894 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	bc6206f Browse files » lib: cpu: Add L2 cache aux control register definition to CA72 ... Add definition of EL1 L2 Auxilary Control register to Cortex A72 library headers. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	031542f Browse files » marvell: drivers: Add MoChi drivers ... Add ModularChip and MCI drivers for A8K SoC family. ModularChip drivers include support for the internal building blocks of Marvell ARMADA SoCs - APN806, APN807 and CP110 Change-Id: I9559343788fa2e5eb47e6384a4a7d47408787c02 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	c0474d5 Browse files » marvell: drivers: Add address decoding units drivers ... Add address decoding unit drivers for Marvell SoCs. Address decoding flow and address translation units chart are located at docs/marvell/misc/mvebu-a8k-addr-map.txt Change-Id: Id6ce311fa1f4f112df3adfac5d20449f495f71ed Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	752faf8 Browse files » maintainers: Add Marvell to maintainers list ... Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	Unverified 2e4eea1 Browse files » Merge pull request #1471 from Anson-Huang/master ... Add i.MX8QX/i.MX8QM power management feature Soby Mathew authored on 18 Jul 2018 GitHub committed on 18 Jul 2018
	e62ea09 Browse files » Fix HCPTR.TCP11 bit definition ... Change-Id: I98f23f6cebcf984b57efc5449b75ff702e1984a0 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 18 Jul 2018
	3039988 Browse files » Fix types of arch.h definitions ... Define the values as unsigned int or unsigned long long based on the actual size of the register. This prevents subtle issues caused by having a type that is too small. For example: #define OPTION_ENABLE 0x3 #define OPTION_SHIFT 32 uint64_t mask = OPTION_ENABLE << OPTION_SHIFT; Because OPTION_ENABLE fits in an int, the value is considered an int. This means that, after shifting it 32 places to the left, the final result is 0. The correct way to define the values is: #define OPTION_ENABLE ULL(0x3) #define OPTION_SHIFT U(32) In this case, the compiler is forced to use a 64 bit value from the start, so shifting it 32 places to the left results in the expected value. Change-Id: Ieaf2ffc2d8caa48c622db011f2aef549e713e019 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 18 Jul 2018
	0107aa4 Browse files » Add missing parentheses to macros in arch.h ... Change-Id: Ifea46da46d1bfd01b341acfad75df5bcab48a204 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 18 Jul 2018