2017-05-03 |
Use SPDX license identifiers
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To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by FreeBSD have not been modified.
[0]: https://spdx.org/
Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
dp-arm
committed
on 3 May 2017
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2017-04-12 |
Merge pull request #885 from antonio-nino-diaz-arm/an/console-flush
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Implement console_flush()
davidcunado-arm
authored
on 12 Apr 2017
GitHub
committed
on 12 Apr 2017
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2017-03-31 |
Add console_flush() to console API
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This function ensures that console output is flushed, for example
before shutting down or use by another component
In line with other console APIs, console_flush() wraps
console_core_flush().
Also implement console_core_flush() for PL011.
Change-Id: I3db365065e4de04a454a5c2ce21be335a23a01e4
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 31 Mar 2017
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2017-03-22 |
mbedtls: Namespace TF specific macros
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These macros are not part of mbed TLS so they should not be prefixed
with `MBEDTLS_` to avoid potential collision in the future. Use the
`TBBR_` suffix to highlight that they only used in TF.
`MBEDTLS_KEY_ALG` was not modified because that is documented and used
by platforms to select the key algorithm.
Change-Id: Ief224681715c481691c80810501830ce16e210b0
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
dp-arm
committed
on 22 Mar 2017
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2017-01-23 |
drivers: add designware emmc driver
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Support Designware eMMC driver. It's based on both IO block
and eMMC driver.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang
committed
on 23 Jan 2017
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2017-01-13 |
Merge pull request #807 from nmenon/upstream/fix-16650-rx
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uart: 16550: Fix getc
davidcunado-arm
authored
on 13 Jan 2017
GitHub
committed
on 13 Jan 2017
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2017-01-10 |
uart: 16550: Fix getc
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tbz check for RDR status is to check for a bit being zero.
Unfortunately, we are using a mask rather than the bit position.
Further as per http://www.ti.com/lit/ds/symlink/pc16550d.pdf (page 17),
LSR register bit 0 is Data ready status (RDR), not bit position 2.
Update the same to match the specification.
Reported-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Nishanth Menon
committed
on 10 Jan 2017
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2016-12-20 |
Merge pull request #793 from jeenu-arm/gic-changes
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GIC driver changes for extended power management
danh-arm
authored
on 20 Dec 2016
GitHub
committed
on 20 Dec 2016
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2016-12-15 |
GICv3: Introduce power management APIs for Redistributor
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Some GICv3 implementations have provision for power management
operations at Redistributor level. This patch introduces and provides
place-holders for Redistributor power management. The default
implementations are empty stubs, but are weakly bound so as to enable
implementation-specific drivers to override them.
Change-Id: I4fec1358693d3603ca5dce242a2f7f0e730516d8
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Jeenu Viswambharan
committed
on 15 Dec 2016
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2016-12-14 |
Fix incorrect copyright notices
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Some files have incorrect copyright notices, this patch fixes all
files with deviations from the standard notice.
Change-Id: I66b73e78a50a235acb55f1e2ec2052a42c0570d2
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 14 Dec 2016
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2016-12-01 |
emmc/sd: for C99 compliance, changed the unsigned char/short bitfield to unsigned int bitfields
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C99 restricts bitfields type is signed and unsigned integer or _Bool.
See section 6.7.2.1 Structure and union specifiers.
"A bit-field shall have a type that is a qualified or unqualified version
of _Bool, signed int, unsigned int, or some other implementation-defined type."
Since the compiler packs bitfields anyways, actual data layout in the structure is unaffected.
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Qixiang.Xu
committed
on 1 Dec 2016
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2016-09-20 |
partition: check GPT partition table
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Now only support GPT partition table. MBR partition table isn't
supported yet.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang
committed
on 20 Sep 2016
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2016-08-11 |
emmc: support CMD23
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Support CMD23. When CMD23 is used, CMD12 could be avoided.
Two scenarios:
1. CMD17 for single block, CMD18 + CMD12 for multiple blocks.
2. CMD23 + CMD18 for both single block and multiple blocks.
The emmc_init() should initialize whether CMD23 is supported
or not.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang
committed
on 11 Aug 2016
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2016-07-27 |
GICv3: Fix the GICD_IROUTER offset
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This patch fixes the offset of GICD_IROUTER register defined in gicv3.h.
Although the GICv3 documention mentions that the offset for this register
is 0x6100-0x7FD8, the offset calculation for an interrupt id `n` is :
0x6000 + 8n, where n >= 32
This requires the offset for GICD_IROUTER to be defined as 0x6000.
Fixes ARM-software/tf-issues#410
Change-Id: If9e91e30d946afe7f1f60fea4f065c7567093fa8
Soby Mathew
committed
on 27 Jul 2016
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2016-07-18 |
Rework type usage in Trusted Firmware
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This patch reworks type usage in generic code, drivers and ARM platform files
to make it more portable. The major changes done with respect to
type usage are as listed below:
* Use uintptr_t for storing address instead of uint64_t or unsigned long.
* Review usage of unsigned long as it can no longer be assumed to be 64 bit.
* Use u_register_t for register values whose width varies depending on
whether AArch64 or AArch32.
* Use generic C types where-ever possible.
In addition to the above changes, this patch also modifies format specifiers
in print invocations so that they are AArch64/AArch32 agnostic. Only files
related to upcoming feature development have been reworked.
Change-Id: I9f8c78347c5a52ba7027ff389791f1dad63ee5f8
Soby Mathew
committed
on 18 Jul 2016
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2016-06-13 |
Merge pull request #629 from ljerry/tf_issue_398
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Bring IO storage dummy driver
danh-arm
authored
on 13 Jun 2016
GitHub
committed
on 13 Jun 2016
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2016-05-27 |
Merge pull request #632 from rockchip-linux/support-for-gpio-driver-v2
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rockchip/rk3399: Support the gpio driver and configure
danh-arm
committed
on 27 May 2016
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2016-05-26 |
gpio: support gpio set/get pull status
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On some platform gpio can set/get pull status when input, add these
function so we can set/get gpio pull status when need it. And they are
optional function.
Caesar Wang
committed
on 26 May 2016
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2016-05-25 |
CCN: Add API to query the PART0 ID from CCN
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This patch adds the API `ccn_get_part0_id` to query the PART0 ID from the
PERIPHERAL_ID 0 register in the CCN driver. This ID allows to distinguish
the variant of CCN present on the system and possibly enable dynamic
configuration of the IP based on the variant. Also added an assert in
`ccn_master_to_rn_id_map()` to ensure that the master map bitfield provided
by the platform is within the expected interface id.
Change-Id: I92d2db7bd93a9be8a7fbe72a522cbcba0aba2d0e
Soby Mathew
committed
on 25 May 2016
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2016-05-20 |
Implement generic delay timer
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Add delay timer implementation based on the system generic counter.
This either uses the platform's implementation of
`plat_get_syscnt_freq()` or explicit clock multiplier/divider values
provided by the platform.
The current implementation of udelay has been modified to avoid
unnecessary calculations while waiting on the loop and to make it
easier to check for overflows.
Change-Id: I9062e1d506dc2f68367fd9289250b93444721732
Antonio Nino Diaz
committed
on 20 May 2016
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2016-05-12 |
Bring IO storage dummy driver
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Allow to handle cases where some images are pre-loaded (by debugger for
instance) without introducing many switches in files calling load_* functions.
Fixes: arm-software/tf-issues#398
Signed-off-by: Gerald Lejeune <gerald.lejeune@st.com>
Gerald Lejeune
committed
on 12 May 2016
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2016-04-27 |
drivers: add emmc stack
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In a lot of embedded platforms, eMMC device is the only one storage
device. So loading content from eMMC device is required in ATF.
Create the emmc stack that could co-work with IO block driver.
Support to read/write/erase eMMC blocks on both rpmb and normal
user area. Support to change the IO speed and bus width.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang
committed
on 27 Apr 2016
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IO: support block device type
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FIP is accessed as memory-mapped type. eMMC is block device type.
In order to support FIP based on eMMC, add the new io_block layer.
io_block always access eMMC device as block size. And it'll only
copy the required data into buffer in io_block driver. So preparing
an temporary buffer is required.
When use io_block device, MAX_IO_BLOCK_DEVICES should be declared
in platform_def.h. It's used to support multiple block devices.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang
committed
on 27 Apr 2016
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2016-04-12 |
Use unsigned long long instead of uintptr_t in TZC400/DMC500 drivers
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Currently the `tzc400_configure_region` and `tzc_dmc500_configure_region`
functions uses uintptr_t as the data type for `region_top` and `region_base`
variables, which will be converted to 32/64 bits for AArch32/AArch64
respectively. But the expectation is to keep these addresses at least 64 bit.
This patch modifies the data types to make it at least 64 bit by using
unsigned long long instead of uintptr_t for the `region_top` and
`region_base` variables. It also modifies the associated macros
`_tzc##fn_name##_write_region_xxx` accordingly.
Change-Id: I4e3c6a8a39ad04205cf0f3bda336c3970b15a28b
Yatharth Kochar
committed
on 12 Apr 2016
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2016-04-08 |
Merge pull request #569 from Xilinx/zynqmp-v1
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Support for Xilinx Zynq UltraScale+ MPSoC
danh-arm
committed
on 8 Apr 2016
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2016-04-07 |
Merge pull request #575 from soby-mathew/sm/new_tzc_driver
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Refactor the TZC driver and add DMC-500 driver
danh-arm
committed
on 7 Apr 2016
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2016-04-01 |
drivers: Add Cadence UART driver
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Add a driver for the Cadence UART which is found in Xilinx Zynq SOCs.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Soren Brinkmann
committed
on 1 Apr 2016
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2016-03-31 |
Add ARM CoreLink DMC-500 driver to program TrustZone protection
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The ARM CoreLink DMC-500 Dynamic Memory Controller provides the
programmable address region control of a TrustZone Address Space
Controller. The access permissions can be defined for eight
separate address regions plus a background or default region.
This patch adds a DMC-500 driver to define address regions and
program their access permissions as per ARM 100131_0000_02_en
(r0p0) document.
Change-Id: I9d33120f9480d742bcf7937e4b876f9d40c727e6
Vikram Kanigiri
authored
on 29 Jan 2016
Soby Mathew
committed
on 31 Mar 2016
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Refactor the ARM CoreLink TZC-400 driver
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TrustZone protection can be programmed by both memory and TrustZone
address space controllers like DMC-500 and TZC-400. These peripherals
share a similar programmer's view.
Furthermore, it is possible to have multiple instances of each type of
peripheral in a system resulting in multiple programmer's views.
For example, on the TZC-400 each of the 4 filter units can be enabled
or disabled for each region. There is a single set of registers to
program the region attributes. On the DMC-500, each filter unit has its
own programmer's view resulting in multiple sets of registers to program
the region attributes. The layout of the registers is almost the same
across all these variations.
Hence the existing driver in `tzc400\tzc400.c` is refactored into the
new driver in `tzc\tzc400.c`. The previous driver file is still maintained
for compatibility and it is now deprecated.
Change-Id: Ieabd0528e244582875bc7e65029a00517671216d
Vikram Kanigiri
authored
on 28 Jan 2016
Soby Mathew
committed
on 31 Mar 2016
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TBB: add non-volatile counter support
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This patch adds support for non-volatile counter authentication to
the Authentication Module. This method consists of matching the
counter values provided in the certificates with the ones stored
in the platform. If the value from the certificate is lower than
the platform, the boot process is aborted. This mechanism protects
the system against rollback.
The TBBR CoT has been updated to include this method as part of the
authentication process. Two counters are used: one for the trusted
world images and another for the non trusted world images.
** NEW PLATFORM APIs (mandatory when TBB is enabled) **
int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr);
This API returns the non-volatile counter value stored
in the platform. The cookie in the first argument may be
used to select the counter in case the platform provides
more than one (i.e. TBSA compliant platforms must provide
trusted and non-trusted counters). This cookie is specified
in the CoT.
int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr);
This API sets a new counter value. The cookie may be
used to select the counter to be updated.
An implementation of these new APIs for ARM platforms is also
provided. The values are obtained from the Trusted Non-Volatile
Counters peripheral. The cookie is used to pass the extension OID.
This OID may be interpreted by the platform to know which counter
must return. On Juno, The trusted and non-trusted counter values
have been tied to 31 and 223, respectively, and cannot be modified.
** IMPORTANT **
THIS PATCH BREAKS THE BUILD WHEN TRUSTED_BOARD_BOOT IS ENABLED. THE
NEW PLATFORM APIs INTRODUCED IN THIS PATCH MUST BE IMPLEMENTED IN
ORDER TO SUCCESSFULLY BUILD TF.
Change-Id: Ic943b76b25f2a37f490eaaab6d87b4a8b3cbc89a
Juan Castillo
committed
on 31 Mar 2016
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