Tegra: Enable irq as wake-up event for cpu_standby ...

As per ARM ARM D1.17.2, any physical IRQ interrupt received by the PE
will be treated as a wake-up event, if SCR_EL3.IRQ is set to '1',
irrespective of the value of the PSTATE.I bit value.

This patch programs the SCR_EL3.IRQ bit before entering CPU standby
state, to allow an IRQ to wake the PE. On waking up, the previous
SCR_EL3 value is restored.

Change-Id: Ie81cf3a7668f5ac35f4bf2ecc461b91b9b60650c
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>

Tegra: remove unused libc files from makefile ...

This patch redefines the variable LIBC_SRCS for Tegra platforms,
to remove unused libc files from the list. This patch is a building
block to eventually use other libc implementations in the future.

Change-Id: Iccde5a75f5e2d6f4e2dbc6274beb423b80e846fd
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Introduce build option to override libc ...

This patch introduces a build option 'OVERRIDE_LIBC' that platforms
can set to override libc from the BL image. The default value is '0'
to keep the library.

Change-Id: I10a0b247f6a782eeea4a0359e30a8d79b1e9e4e1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Merge pull request #1804 from antonio-nino-diaz-arm/an/cleanup ...

Minor cleanup

Merge pull request #1806 from thomas-arm/master ...

sgi/sgm: add a second maintainer for Arm's SGI and SGM platforms

sgi/sgm: add a second maintainer for Arm's SGI and SGM platforms ...

Add a second maintainer for Arm's SGI and SGM platform support in
trusted firmware to handle the review and maintenance of
existing and upcoming platforms.

Change-Id: Ie7fa8da280d9351f7543122fb261d6ac6c7e15ad
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>

Merge pull request #1799 from soby-mathew/sm/gicr_probe ...

GICv3: Allow probe for fewer GICR interfaces than exposed by the frame

Merge pull request #1783 from thloh85-intel/integration_v2 ...

plat: intel: Add BL2 support for Stratix 10 SoC

GICv3: Allow probe for fewer GICR interfaces than exposed by the frame ...

Previously the GICv3 redistributor probe function
(gicv3_rdistif_base_addrs_probe()) asserted that the number of
per-CPU redistributor interfaces expected to be probed by the
platform is equal to the number exported by the redistributor
frame. This is a problem in case the number of CPUs in the
platform is less than the number of redistributor interfaces
in the frame. Hence this patch removes the assertion check
and allows probe for fewer redistributor interfaces as required
by the platform.

Change-Id: I3449763a3ad70817224442cbe184d001030c9874
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Merge pull request #1803 from sandrine-bailleux-arm/sb/arm-bl33-fixes ...

Fixes related to BL33 image on Arm platforms

Merge pull request #1796 from grandpaul/rpi3-sdhost-driver ...

RPi3 SDHost driver

plat: intel: Add BL2 support for Stratix 10 SoC ...

This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>

Remove unneeded include paths in PLAT_INCLUDES ...

Also, update platform_def.h guidelines about includes in the porting
guide.

Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

xlat v2: Fix comment ...

Change-Id: Id7c22d76b896d1dcac18cdb0e564ce4e02583e33
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Remove duplicated definitions of linker symbols ...

Many parts of the code were duplicating symbols that are defined in
include/common/bl_common.h. It is better to only use the definitions in
this header.

As all the symbols refer to virtual addresses, they have to be
uintptr_t, not unsigned long. This has also been fixed in bl_common.h.

Change-Id: I204081af78326ced03fb05f69846f229d324c711
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1800 from sandrine-bailleux-arm/sb/load-img-v2 ...

Remove dead code related to LOAD_IMAGE_V2=0

Merge pull request #1802 from oscardagrach/master ...

hikey960: EDMAC: leave channel 0 as secure

Arm platforms: Fix max size of BL33 image ...

The BL33 image must not go past the end of DRAM.

Change-Id: I56668ab760d82332d69a8904d125d9a055aa91d5
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

Arm platforms: Rename PLAT_ARM_NS_IMAGE_OFFSET ...

PLAT_ARM_NS_IMAGE_OFFSET is in fact not an offset relative to some base
address, it is an absolute address. Rename it to avoid any confusion.

Change-Id: I1f7f5e8553cb267786afe7e5f3cd4d665b610d3f
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

maintainers: Add maintainter for Raspberry Pi 3 platform. ...

This patch adds myself to co-maintainer list of Raspberry Pi 3
platform.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>

rpi3: Enable SDHost driver in BL2 ...

This patch inits SDHost in BL2 earlysetup. BL2 can start operating mmc
commands to read/write MMC raw blocks.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>

rpi3: Add SDHost driver ...

This commit adds SDHost driver for RaspberryPi3. SDHost driver uses the
GPIO driver to connect the SDCard and SDHost. By using this driver it is
able to read/write raw blocks on SDCard.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>

Merge pull request #1801 from sandrine-bailleux-arm/sb/doc ...

User Guide: Move ARM_PLAT_MT doc to Arm build flags

Tegra: restrict non-secure PMC accesses ...

Platforms that do not support bpmp firmware, do not need access
to the PMC block from outside of the CPU complex. The agents
running on the CPU can always access the PMC through the EL3
exception space.

This patch restricts non-secure world access to the PMC block on
such platforms.

Change-Id: I2c4318dc07ddf6407c1700595e0f4aac377ba258
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra186: memctrl: disable stream id writes for MC clients ...

As per the latest recommendations from the hardware team, write access
needs to be disabled for APE, BPMP, NvDec and SCE clients. This patch
disables stream id register writes for these MC clients to implement
those recommendations.

Change-Id: I8887c0f2cc5bc3fc5bba42074810ba5c1d3f121f
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>

Tegra: bpmp: mark device "not present" on boot timeout ...

This patch updates the state machine to "not present" if the bpmp
firmware is not found in the system during boot. The suspend
handler also checks now if the interface exists, before updating
the internal state machine.

Reported by: Kalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com>

Change-Id: If8fd7f8e412bb603944555c24826855226e7f48c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra210: toggle ring oscillator across cluster idle ...

This patch toggles the ring oscillator state across cluster idle
as DFLL loses its state. We dont want garbage values being written
to the pmic when we enter cluster idle state, so enable "open loop"
when we enter CC6 and restore the state to "closed loop" on exit.

Change-Id: I56f4649f57bcc651d6c415a6dcdc978e9444c97b
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra210: clear PMC_DPD registers on resume ...

This patch clears the PMC's DPD registers on resuming from System
Suspend, for all Tegra210 platforms that support the sc7entry-fw.

Change-Id: I7881ef0a5f609ed28b158bc2f4016abea3c7f305
Signed-off-by: kalyani chidambaram <kalyanic@nvidia.com>

Tegra210: suspend/resume bpmp interface across System Suspend ...

The BPMP firmware takes some time to initialise its state on exiting
System Suspend state. The CPU needs to synchronize with the BPMP during
this process to avoid any race conditions. This patch suspends and resumes
the BPMP interface across a System Suspend cycle, to fix this race.

Change-Id: I82a61d12ef3eee267bdd8d4386bed23397fbfd2d
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: bpmp: suspend/resume handlers ...

This patch adds suspend and resume handlers for the BPMP
interface. Mark the interface as "suspended" before entering
System Suspend and verify that BPMP is alive on exit.

Change-Id: I74ccbc86125079b46d06360fc4c7e8a5acfbdfb2
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>