Add comments about mismatched TCR_ELx and xlat tables ...

When the MMU is enabled and the translation tables are mapped, data
read/writes to the translation tables are made using the attributes
specified in the translation tables themselves. However, the MMU
performs table walks with the attributes specified in TCR_ELx. They are
completely independent, so special care has to be taken to make sure
that they are the same.

This has to be done manually because it is not practical to have a test
in the code. Such a test would need to know the virtual memory region
that contains the translation tables and check that for all of the
tables the attributes match the ones in TCR_ELx. As the tables may not
even be mapped at all, this isn't a test that can be made generic.

The flags used by enable_mmu_xxx() have been moved to the same header
where the functions are.

Also, some comments in the linker scripts related to the translation
tables have been fixed.

Change-Id: I1754768bffdae75f53561b1c4a5baf043b45a304
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1273 from antonio-nino-diaz-arm/an/fix-tlbi-disable-mmu ...

Ensure the correct execution of TLBI instructions

Merge pull request #1276 from swarren/issue-551 ...

Make all build results depend on all makefiles

Merge pull request #1264 from fengbaopeng/integration ...

drivers:ufs: fix hynix ufs bug with quirk on hi36xx SoC

drivers:ufs: fix hynix ufs bug with quirk on hi36xx SoC ...

Hynix ufs has deviations on hi36xx platform which will result
in ufs bursts transfer failures at a very low probability.

To fix the problem, the Hynix device must set the register
VS_DebugSaveConfigTime to 0x10, which will set time reference
for SaveConfigTime is 250 ns. The time reference for SaveConfigTime
is 40 ns by default.

Signed-off-by: fengbaopeng <fengbaopeng@hisilicon.com>

Merge pull request #1281 from antonio-nino-diaz-arm/an/fix-foundation-instructions ...

Fix Foundation FVP instructions in User Guide

Merge pull request #1262 from ssalko/ssalko_dev ...

qemu: Fix interrupt type check

Merge pull request #1279 from soby-mathew/sm/BL2_base_assert ...

ARM Platforms: Add assertion for BL2_BASE

Fix Foundation FVP instructions in User Guide ...

The Arm Trusted Firmware is built by default for ARMv8-A version 8.0.
However, the Foundation FVP runs by default in the highest version of
the architecture it supports. This causes problems when trying to run
the Arm Trusted Firmware on it.

This patch adds a note to the User Guide about this problem.

Change-Id: I0220fe1a9c66c2292149ad4a7ffe5e27ba08ab28
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1278 from soby-mathew/sm/aarch32_errata_fix ...

Fixup AArch32 errata printing framework

Fixup AArch32 errata printing framework ...

The AArch32 assembly implementation of `print_errata_status` did not save
a register which was getting clobbered by a `get_cpu_ops_ptr`. This
patch fixes that.

Change-Id: Id0711e46b7c685a18a10328d4b513e952a5d860b
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

ARM Platforms: Add CASSERT for BL2_BASE ...

Change-Id: I93e491fde2a991fc39584c2762f33cbea40541e3
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

ARM Platforms: Don't build BL1 and BL2 if RESET_TO_SP_MIN=1 ...

Change-Id: Iadb21bb56f2e61d7e6aec9b3b3efd30059521def
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Make all build results depend on all makefiles ...

This makes incremental builds work when the only change is to a
definition in a makefile.

Fixes arm-software/tf-issues#551

Signed-off-by: Stephen Warren <swarren@nvidia.com>

Merge pull request #1275 from soby-mathew/sm/tzc400_fix ...

Resolve TZC400 build issue when DEBUG=1 and ENABLE_ASSERTIONS=0

Resolve TZC400 build issue when DEBUG=1 and ENABLE_ASSERTIONS=0 ...

Previously the definition of `_tzc_read_peripheral_id()` was wrapped
in ENABLE_ASSERTIONS build flag. This causes build issue for TZC400 driver
when DEBUG=1 and ENABLE_ASSERTIONS=0. This patch fixes the same by
moving the definitions outside the ENABLE_ASSERTIONS build flag.

Change-Id: Ic1cad69f02ce65ac34aefd39eaa96d5781043152
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Ensure the correct execution of TLBI instructions ...

After executing a TLBI a DSB is needed to ensure completion of the
TLBI.

rk3328: The MMU is allowed to load TLB entries for as long as it is
enabled. Because of this, the correct place to execute a TLBI is right
after disabling the MMU.

Change-Id: I8280f248d10b49a8c354a4ccbdc8f8345ac4c170
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1270 from antonio-nino-diaz-arm/an/smc-unknown ...

Redefine SMC_UNK as -1 instead of 0xFFFFFFFF

Merge pull request #1271 from afaerber/tegra-fixes ...

tegra: Fix mmap_region_t struct mismatch

Merge pull request #1259 from hzhuang1/fix_uart ...

hikey960: avoid hardcode on uart port

tegra: Fix mmap_region_t struct mismatch ...

Commit fdb1964 ("xlat: Introduce
MAP_REGION2() macro") added a granularity field to mmap_region_t.

Tegra platforms were using the v2 xlat_tables implementation in
common/tegra_common.mk, but v1 xlat_tables.h headers in soc/*/plat_setup.c
where arrays are being defined. This caused the next physical address to
be read as granularity, causing EINVAL error and triggering an assert.

Consistently use xlat_tables_v2.h header to avoid this.

Fixes ARM-software/tf-issues#548.

Signed-off-by: Andreas Färber <afaerber@suse.de>

hikey960: avoid hardcode on uart port ...

Avoid hardcode on uart port. The uart port could be auto detected
on HiKey960 platform.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

Merge pull request #1268 from jeenu-arm/ehf-pri-fix ...

EHF: Fix priority check

Merge pull request #1267 from jeenu-arm/console-fix ...

ARM platforms: Fix console address for flush

Merge pull request #1266 from antonio-nino-diaz-arm/an/misra-urls ...

Remove URLs from comments

Merge pull request #1258 from vchong/optee_dbg ...

optee: print header info before validate

Redefine SMC_UNK as -1 instead of 0xFFFFFFFF ...

According to the SMC Calling Convention (ARM DEN0028B):

    The Unknown SMC Function Identifier is a sign-extended value of
    (-1) that is returned in R0, W0 or X0 register.

The value wasn't sign-extended because it was defined as a 32-bit
unsigned value (0xFFFFFFFF).

SMC_PREEMPT has been redefined as -2 for the same reason.

NOTE: This might be a compatibility break for some AArch64 platforms
that don't follow the previous version of the SMCCC (ARM DEN0028A)
correctly. That document specifies that only the bottom 32 bits of the
returned value must be checked. If a platform relies on the top 32 bits
of the result being 0 (so that SMC_UNK is 0x00000000FFFFFFFF), it will
have to fix its code to comply with the SMCCC.

Change-Id: I7f7b109f6b30c114fe570aa0ead3c335383cb54d
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Remove URLs from comments ...

This fixes all defects according to MISRA Rule 3.1: "The character
sequences /* and // shall not be used within a comment". This affects
all URLs in comments, so they have been removed:

- The link in `sdei_state.c` can also be found in the documentation file
  `docs/sdei.rst`.

- The bug that the file `io_fip.c` talks about doesn't affect the
  currently supported version of GCC, so it doesn't make sense to keep
  the comment. Note that the version of GCC officially supported is the
  one that comes with Linaro Release 17.10, which is GCC 6.2.

- The link in `tzc400.c` was broken, and it didn't correctly direct to
  the Technical Reference Manual it should. The link has been replaced
  by the title of the document, which is more convenient when looking
  for the document.

Change-Id: I89f60c25f635fd4c008a5d3a14028f814c147bbe
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

EHF: Fix priority check ...

When deactivating, it's not an error if the priority being deactivating
is equal to the active priority. Fix this.

Change-Id: I66f0e9e775ac9aba8a7cc48cd3ecd3b358be63c0
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

ARM platforms: Fix console address for flush ...

The console core flush API expects the base address in the first
register, but ARM helpers currently sets the second register with the
base address. This causes an assert failure.

This patch fixes that.

Change-Id: Ic54c423cd60f2756902ab3cfc77b3de2ac45481e
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>