LuminaSensum/arm-trusted-firmware

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LuminaSensum / arm-trusted-firmware

2018-07-26	903f13d Browse files » ti: k3: common: Only enable caches early ... We can enter and exit coherency without any software operations, but HW_ASSISTED_COHERENCY has stronger implications that are causing issues. Until these can be resolved, only use the weaker WARMBOOT_ENABLE_DCACHE_EARLY flag. Signed-off-by: Andrew F. Davis <afd@ti.com> Andrew F. Davis committed on 26 Jul 2018
	9262eb5 Browse files » GIC: Do not flush cache when unneeded ... When a platform enables its caches before it initializes the GICC/GICR interface then explicit cache maintenance is not needed. Remove these here. Signed-off-by: Andrew F. Davis <afd@ti.com> Andrew F. Davis committed on 26 Jul 2018
	39a8fa7 Browse files » PSCI: Fix logic error to skip cache flushing ... If either USE_COHERENT_MEM or HW_ASSISTED_COHERENCY being true should cause us to not enter the ifdef block, then the logic is not correct here. Posibly bad use of De Morgan's law? Fix this. Signed-off-by: Andrew F. Davis <afd@ti.com> Andrew F. Davis committed on 26 Jul 2018
2018-07-25	Unverified 60e062f Browse files » Merge pull request #1486 from antonio-nino-diaz-arm/an/psci-misra ... Fix several MISRA defects in PSCI library danh-arm authored on 25 Jul 2018 GitHub committed on 25 Jul 2018
	Unverified d87d524 Browse files » Merge pull request #1466 from Yann-lms/stm32mp1 ... Add STMicroelectronics STM32MP1 platform support danh-arm authored on 25 Jul 2018 GitHub committed on 25 Jul 2018
	Unverified e16d459 Browse files » Merge pull request #1492 from jts-arm/docs ... Reword LOAD_IMAGE_V2 in user guide & fix a typo danh-arm authored on 25 Jul 2018 GitHub committed on 25 Jul 2018
	Unverified cad25f1 Browse files » Merge pull request #1491 from jeenu-arm/misra-fix ... Arm platforms: Fix type mismatch for arm_pm_idle_states danh-arm authored on 25 Jul 2018 GitHub committed on 25 Jul 2018
	Unverified f94523e Browse files » Merge pull request #1472 from danielboulby-arm/db/Reclaim ... Rework page table setup for varying number of mem regions danh-arm authored on 25 Jul 2018 GitHub committed on 25 Jul 2018
2018-07-24	efb3728 Browse files » Update list of maintainers for STM32MP1 ... Signed-off-by: Yann Gautier <yann.gautier@st.com> Yann Gautier committed on 24 Jul 2018
	f0958d8 Browse files » stm32mp1: Add platform documentation ... Signed-off-by: Yann Gautier <yann.gautier@st.com> Yann Gautier committed on 24 Jul 2018
	f74cbc9 Browse files » stm32mp1: Link BL2, BL32 and DTB in one binary ... platform.mk is updated to have compilation rules for DTB, stm32image tool, and the concatenation of the 3 binaries. A new linker script and an assembly file are added to manage this. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Yann Gautier committed on 24 Jul 2018
	5fbcdd0 Browse files » tools: Add stm32image tool into TF-A ... This tools adds a specific header to ST TF-A binary. This header is used by STM32MP1 ROM code to check the bootloader. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Yann Gautier committed on 24 Jul 2018
	587f60f Browse files » stm32mp1: Add device tree files ... Those device tree files are taken from STM32MP1 U-Boot and Linux. And they are updated to fit TF-A needs. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Yann Gautier committed on 24 Jul 2018
	964dfee Browse files » stm32mp1: Add BL32 SP_min secure monitor ... Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Yann Gautier committed on 24 Jul 2018
	10a511c Browse files » stm32mp1: Add DDR support and its security with TZC400 ... The DDR driver is under dual license, BSD and GPLv2. The configuration parameters are taken from device tree. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Yann Gautier committed on 24 Jul 2018
	e4f559f Browse files » stm32mp1: Add PMIC support ... If a PMIC companion chip is present on board, it has to be configured for regulators supplies. This check is done with board DT configuration. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Pascal Paillet <p.paillet@st.com> Yann Gautier committed on 24 Jul 2018
	278c34d Browse files » stm32mp1: Add console support ... Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Yann Gautier committed on 24 Jul 2018
	e58a53f Browse files » stm32mp1: save boot information in backup registers ... This will be used by BL33 to get boot device and instance. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Yann Gautier committed on 24 Jul 2018
	6a339a4 Browse files » stm32mp1: Add GPIO support ... The management of pinctrl nodes of device tree is also added. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Yann Gautier committed on 24 Jul 2018
	7839a05 Browse files » stm32mp1: Add clock and reset support ... The clock driver is under dual license, BSD and GPLv2. The clock driver uses device tree, so a minimal support for this is added. The required files for driver and DTS files are in include/dt-bindings/. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Yann Gautier committed on 24 Jul 2018
	4353bb2 Browse files » Introduce STMicroelectronics STM32MP1 platform ... STM32MP1 is a microprocessor designed by STMicroelectronics, based on a dual Arm Cortex-A7. It is an Armv7-A platform, using dedicated code from TF-A. STM32MP1 uses BL2 compiled with BL2_AT_EL3. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Pascal Paillet <p.paillet@st.com> Yann Gautier committed on 24 Jul 2018
	836be05 Browse files » Add STMicroelectronics to the list of contributors ... Signed-off-by: Yann Gautier <yann.gautier@st.com> Yann Gautier committed on 24 Jul 2018
	d323af9 Browse files » Rework page table setup for varying number of mem regions ... Change arm_setup_page_tables() to take a variable number of memory regions. Remove coherent memory region from BL1, BL2 and BL2U as their coherent memory region doesn't contain anything and therefore has a size of 0. Add check to ensure this doesn't change without us knowing. Change-Id: I790054e3b20b056dda1043a4a67bd7ac2d6a3bc0 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com> Daniel Boulby committed on 24 Jul 2018
	Unverified cffb003 Browse files » Merge pull request #1488 from b49020/integration ... synquacer: Enable optional OP-TEE support danh-arm authored on 24 Jul 2018 GitHub committed on 24 Jul 2018
	Unverified 790e6c5 Browse files » Merge pull request #1485 from jeenu-arm/ras ... Double-fault and fatal error handling support danh-arm authored on 24 Jul 2018 GitHub committed on 24 Jul 2018
	4901c53 Browse files » Reword LOAD_IMAGE_V2 in user guide & fix a typo ... Change-Id: Id2639218dfffec84d8b0fa295d7e896129d4fcd7 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com> John Tsichritzis committed on 24 Jul 2018
	6cb2a39 Browse files » synquacer: Enable optional OP-TEE support ... OP-TEE loading is optional on Developerbox controlled via SCP firmware. To check if OP-TEE is loaded or not, we use DRAM1 region info passed by SCP firmware. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org> Sumit Garg committed on 24 Jul 2018
	Unverified df0b5a4 Browse files » Merge pull request #1487 from hzhuang1/tbb_bl1 ... hikey: include TBB in BL1 danh-arm authored on 24 Jul 2018 GitHub committed on 24 Jul 2018
	ecd6242 Browse files » Arm platforms: Fix type mismatch for arm_pm_idle_states ... This also gets rid of MISRA violations for Rule 8.3 and 8.4. Change-Id: I45bba011b16f90953dd4b260fcd58381f978eedc Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 24 Jul 2018
	6b7b0f3 Browse files » PSCI: Fix MISRA defects in common and setup code ... MISRA C-2012 Rules 10.1, 10.3, 17.8 and 20.7. Change-Id: I3980bd2a1d845559af4bbe2887a0250d0506a064 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 24 Jul 2018