| 2019-09-11 |
amlogic: Fix includes order
...
As part of the code refactoring fix the order of the include files
across all the source files.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ice72f687cc26ee881a9051168149467688100cfb
Carlo Caione
committed
on 11 Sep 2019
|
amlogic: Fix header guards
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Make the header guards more generic and contextually remove the
GXBB_BL31_PLAT_PARAM_VAL value that is unused on the GXL platform.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I842fa2e084e71280ae17b39c67877e844821a171
Carlo Caione
committed
on 11 Sep 2019
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| 2019-09-05 |
amlogic: Fix prefixes in the SoC specific files
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Remove the GXBB prefix where needed and add SoC specific prefixes for
GXBB/GXL.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ic3eb3a77ca2d9c779a9dee5cee786e9c16ecdb27
Carlo Caione
committed
on 5 Sep 2019
|
amlogic: Fix prefixes in the PM code
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Remove the GXBB prefix from the code in the common directory and add
SoC-specific prefixes in the SoC specific code.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ic983ef70b0ef23f95088dd8df488d8c42c3bc030
Carlo Caione
committed
on 5 Sep 2019
|
amlogic: Fix prefixes in the SCPI related code
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Add a new aml_* prefix to the SCPI related function calls.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I697812ac1c0df28cbb639a1dc3e838f1107fb739
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Fix prefixes in the MHU code
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Make the MHU code AML specific adding a new aml_* prefix and remove the
GXBB prefix from the register names.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I8f20918e29f08542bd71bd679f88e65b4efaa7d2
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Fix prefixes in the SIP/SVC code
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All the SIP/SVC related code is currently the same between GXL and GXBB.
Rename function names and register names to avoid hardcoding the GXBB
prefix.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I7e58ab68489df8d4762663fc01fb64e6899cc8bf
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Fix prefixes in the thermal driver
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No need to have a special SoC-specific prefix.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I0da543e7d92d56604e79440a98027ffd9a2eaa59
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Fix prefixes in the private header file
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The header file is shared between all the SoCs. Better avoiding
hardcoding the SoC name in the function names.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I9074871bd1ed8a702c1a656e0f50f2d3c6cb0425
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Fix prefixes in the efuse driver
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The efuse driver is hardcoding the GXBB prefix. No need to do that since
the driver is shared between multiple SoCs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I97691b0bbd55170d8216d301a3fc04feb8c2af2e
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Fix prefixes in the platform macros file
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Fixing at the same time the related register names.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ib1130d50abe6088f1c0826878d1ae454a0f23008
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Fix prefixes in the helpers file
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The code is the common directory is now generic, no need to have the SoC
prefix hardcoded in the function names.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ied3a5e506b9abd4c2d6f893bafef50019bff24f1
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Rework Makefiles
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Now that every piece is in place, the makefiles can be refactored and
slightly beautified removing useless and redundant parts.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: If74e1909df52d475cf4b0dfed819d07d3a4c85b9
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move the SIP SVC code to common directory
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The code is the same between GXBB and GXL. Move it to the common source
directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I875689a6fd029971aa755fc2725217e90ed06b6c
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move topology file to common directory
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As done already for multiple files, move the topology file to the common
directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Iaca357a089593ad58c35c05c929239132249dcda
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move thermal code to common directory
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As for most of the Amlogic code, this is common between the Amlogic
SoCs. Move the code to the common directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Id3f0073ff1f0b9ddbe964f80303323ee4a2f27b0
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move MHU code to common directory
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The MHU code is shared between all the supported platforms. Move it to
the common directory instead.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Iaf53122866eae85c13f772927d16836dcfa877a3
Carlo Caione
committed
on 5 Sep 2019
|
amlogic: Move efuse code to common directory
...
The efuse code is the same between GXL and GXBB. Move the code to common
directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ie37f21d1907a36292724f1fb645a78041fe4a6b3
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move platform macros assembly file to common directory
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The platform macros are shared between all the SoCs. Move it to common
directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ia04c3ffe4d7b068aa701268ed99f69995d8db92b
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Introduce unified private header file
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Now that also the SHA256 DMA driver is shared between all the SoCs, we
can have one single private platform header file.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I77d51915f9d8233aeceeed66ed1f491573402cfc
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move SCPI code to common directory
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The SCPI code is the same between GXBB and GXL. No need to have it
replicated for each SoCs. Move it to the common directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I7e416caf1e9538b3ce7702c0363ee00a054e2451
Carlo Caione
committed
on 5 Sep 2019
|
amlogic: Move the SHA256 DMA driver to common directory
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The SHA256 DMA driver can be used by multiple SoCs. Move it to the
common directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I96319eeeeeebd503ef0dcb07c0e4ff6a67afeaa5
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move assembly helpers to common directory
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The assembly helpers are common to all the amlogic SoCs. Move the .S
file to the common directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I0d8616a7ae22dbcb14848cefd0149b6bb5814ea6
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Introduce directory parameters in the makefiles
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Make the platform name a parameter for the source directories. Besides a
cosmetic fix, this is going to be helpful when reusing the same Makefile
for different SoCs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I307897a21800cca8ad68a5ab8972d27e9356ff2a
Carlo Caione
committed
on 5 Sep 2019
|
meson: Rename platform directory to amlogic
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Meson is the internal code name for the SoC family. The correct name for
the platform should be Amlogic. Change the name of the platform
directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Icc140e1ea137f12117acbf64c7dcb1a8b66b345d
Carlo Caione
committed
on 5 Sep 2019
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| 2019-08-28 |
Merge "intel: agilex: Clear PLL lostlock bypass mode" into integration
Paul Beesley
authored
on 28 Aug 2019
TrustedFirmware Code Review
committed
on 28 Aug 2019
|
| 2019-08-27 |
Merge "tegra: add support for multi console interface" into integration
Sandrine Bailleux
authored
on 27 Aug 2019
TrustedFirmware Code Review
committed
on 27 Aug 2019
|
| 2019-08-23 |
Merge "AArch64: Disable Secure Cycle Counter" into integration
Paul Beesley
authored
on 23 Aug 2019
TrustedFirmware Code Review
committed
on 23 Aug 2019
|
| 2019-08-21 |
AArch64: Disable Secure Cycle Counter
...
This patch fixes an issue when secure world timing information
can be leaked because Secure Cycle Counter is not disabled.
For ARMv8.5 the counter gets disabled by setting MDCR_El3.SCCD
bit on CPU cold/warm boot.
For the earlier architectures PMCR_EL0 register is saved/restored
on secure world entry/exit from/to Non-secure state, and cycle
counting gets disabled by setting PMCR_EL0.DP bit.
'include\aarch64\arch.h' header file was tided up and new
ARMv8.5-PMU related definitions were added.
Change-Id: I6f56db6bc77504634a352388990ad925a69ebbfa
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Alexei Fedorov
committed
on 21 Aug 2019
|
| 2019-08-20 |
Merge "plat/arm: Introduce corstone700 platform." into integration
Paul Beesley
authored
on 20 Aug 2019
TrustedFirmware Code Review
committed
on 20 Aug 2019
|
