Merge "Workaround for Cortex A77 erratum 1508412" into integration

Merge changes I1ecbe5a1,Ib5945c37,Ic6b79648 into integration ...

* changes:
  plat/arm: Add platform support for Morello
  fdts: add device tree sources for morello platform
  lib/cpus: add support for Morello Rainier CPUs

Merge "arm_fpga: Add support for unknown MPIDs" into integration

plat/arm: Add platform support for Morello ...

This patch adds support for Morello platform.
It is an initial port which includes only BL31 support
as the System Control Processor (SCP) is expected to take
the role of primary bootloader.

Change-Id: I1ecbe5a14a2d487b2ecea3c1ca227f08473ed2dd
Co-authored-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Signed-off-by: Anurag Koul <anurag.koul@arm.com>

fdts: add device tree sources for morello platform ...

Change-Id: Ib5945c37983505f327a195bdb8b91ed1b7b90921
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>

lib/cpus: add support for Morello Rainier CPUs ...

This patch adds CPU support for the Rainier CPU which is
derived from Neoverse N1 r4p0 CPU and implements the
Morello capability architecture.

Change-Id: Ic6b796481da5a66504ecb0648879446edf4c69fb
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>

Workaround for Cortex A77 erratum 1508412 ...

Cortex A77 erratum 1508412 is a Cat B Errata present in r0p0 and r1p0.
The workaround is a write sequence to several implementation defined
registers based on A77 revision.

This errata is explained in this SDEN:
https://static.docs.arm.com/101992/0010/Arm_Cortex_A77_MP074_Software_Developer_Errata_Notice_v10.pdf

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I217993cffb3ac57c313db8490e7b8a7bb393379b

arm_fpga: Add support for unknown MPIDs ...

This patch allows the system to fallback to a default CPU library
in case the MPID does not match with any of the supported ones.

This feature can be enabled by setting SUPPORT_UNKNOWN_MPID build
option to 1 (enabled by default only on arm_fpga platform).

This feature can be very dangerous on a production image and
therefore it MUST be disabled for Release images.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I0df7ef2b012d7d60a4fd5de44dea1fbbb46881ba

Merge changes from topic "stm32_drivers_update" into integration ...

* changes:
  clk: stm32mp1: fix rcc mckprot status
  drivers: st: add missing includes in ETZPC header
  mmc: st: clear some flags before sending a command
  mmc: st: correct retries management
  nand: raw_nand: fix timeout issue in nand_wait_ready
  mtd: spi_nor: change message level on macronix detection
  gpio: stm32_gpio: check GPIO node status after checking DT
  crypto: stm32_hash: fix issue when restarting computation

Merge changes from topic "tc0_architecture_change" into integration ...

* changes:
  plat: tc0: enable TZC
  fdts: tc0: update MHUv2 interrupt number

Merge "plat/arm/css/sgi: Map flash used for mem_protect" into integration

Merge "plat/arm: Introduce and use libc_asm.mk makefile" into integration

plat/arm/css/sgi: Map flash used for mem_protect ...

The SGI platform defines the macro PLAT_ARM_MEM_PROT_ADDR which
indicates that the platform has mitigation for cold reboot attacks.

However, the flash memory used for the mem_protect region was not
mapped. This results in a crash when an OS calls PSCI MEM_PROTECT.

To fix this map the flash region used for mem_protect.

Change-Id: Ia494f924ecfe2ce835c045689ba8f942bf0941f4
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>

Merge "Select the Log Level for the Event Log Dump on Measured Boot at build time." into integration

plat: tc0: enable TZC ...

Change-Id: Ic2bb8482f0b602f6b7850d4fa553448bc4931edc
Signed-off-by: Usama Arif <usama.arif@arm.com>

clk: stm32mp1: fix rcc mckprot status ...

MCKPROT hardening in RCC mandates that both bits RCC[TZEN] and
RCC[MCKPROT] are enabled. This change fixes stm32mp1_rcc_is_mckprot()
to check both bits, not RCC[MCKPROT] only.

This change also updates stm32mp1_rcc_is_secure() for consistency.

Change-Id: If1f07babdcb5677906ddbf974d9dc17255d4e174
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

drivers: st: add missing includes in ETZPC header ...

Depending on compiler, the issue about bool or uint*_t not defined can
appear.
Correct this by adding stdbool.h and stdint.h includes in etzpc.h.

Change-Id: If1419dc511efbe682459fa4a776481fa52a38aa3
Signed-off-by: Yann Gautier <yann.gautier@st.com>

mmc: st: clear some flags before sending a command ...

The ICR static flags are cleared before sending a command.
The SDMMC_DCTRLR register is set to 0 if no data is expected on a given
command or on the next command in case of CMD55.

Change-Id: I5ae172a484218f53160e98b3684967c6960475a6
Signed-off-by: Yann Gautier <yann.gautier@st.com>

mmc: st: correct retries management ...

The retries number should be 3.
A warning message is added in mmc_block_read(), and the code is refactored.

Change-Id: I577c7dd91c451c7580b1660042cb5fe26ee3fa12
Signed-off-by: Yann Gautier <yann.gautier@st.com>

nand: raw_nand: fix timeout issue in nand_wait_ready ...

nand_wait_ready is called with a millisecond delay
but the timeout used a micro second. Fixing the conversion
in the timeout call.
The prototype of the function is also changed to use an unsigned int
parameter.

Change-Id: Ia3281be7980477dfbfdb842308d35ecd8b926fb8
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

mtd: spi_nor: change message level on macronix detection ...

Change the detection message from WARN to INFO when macronix
NOR is detected.

Change-Id: I488696f1fb75b823e85decfcd6cd32e7b36a6c2e
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

gpio: stm32_gpio: check GPIO node status after checking DT ...

The call to fdt_get_status(node) has to be done after the DT is found
to be valid.

Fixes: 1fc2130c5 stm32mp1: update device tree and gpio functions

Change-Id: I70f803aae3dde128a9e740f54c8837b64cb1a244
Signed-off-by: Yann Gautier <yann.gautier@st.com>

crypto: stm32_hash: fix issue when restarting computation ...

While restarting a new hash computation, STR register
is not cleared. It needs to be written before each
computation.

Change-Id: If65902dd21f9c139ec5da3ca87721232f73710db
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Merge "libc: Import strtok_r from FreeBSD project" into integration

fdts: tc0: update MHUv2 interrupt number ...

This is as part of the architecture change in TC0.

Change-Id: I470241f67938e7998941d26f0e8bc05073234152
Signed-off-by: Usama Arif <usama.arif@arm.com>

Select the Log Level for the Event Log Dump on Measured Boot at build time. ...

Builds in Debug mode with Measured Boot enabled might run out of trusted
SRAM. This patch allows to change the Log Level at which the Measured Boot
driver will dump the event log, so the latter can be accessed even on
Release builds if necessary, saving space on RAM.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I133689e313776cb3f231b774c26cbca4760fa120

Merge "plat: marvell: ap807: implement workaround for errata-id 3033912" into integration

Merge "SPMC: adjust the number of EC context to max number of PEs" into integration

Merge "n1sdp: add support for remote chip pcie." into integration

Merge "build_macros.mk: include assert and define loop macros" into integration