2015-06-04 |
Introduce PROGRAMMABLE_RESET_ADDRESS build option
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This patch introduces a new platform build option, called
PROGRAMMABLE_RESET_ADDRESS, which tells whether the platform has
a programmable or fixed reset vector address.
If the reset vector address is fixed then the code relies on the
platform_get_entrypoint() mailbox mechanism to figure out where
it is supposed to jump. On the other hand, if it is programmable
then it is assumed that the platform code will program directly
the right address into the RVBAR register (instead of using the
mailbox redirection) so the mailbox is ignored in this case.
Change-Id: If59c3b11fb1f692976e1d8b96c7e2da0ebfba308
Sandrine Bailleux
committed
on 4 Jun 2015
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2015-04-29 |
Move up dependency versions in user guide
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Move up the version numbers in the user guide of:
* DS-5 (to v5.21)
* EDK2 (to v3.0)
* Linux Kernel (to 1.6-Juno)
* Linaro file-system (to 15.03)
* Juno SCP binary (to v1.7.0 within board recovery image 0.11.3).
Change-Id: Ieb09e633acc2b33823ddf35f77f44e7da60b99ba
Sandrine Bailleux
committed
on 29 Apr 2015
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2015-04-28 |
Detect SCP version incompatibility
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There has been a breaking change in the communication protocols used
between the AP cores and the SCP on CSS based platforms like Juno.
This means both the AP Trusted Firmware and SCP firmware must be
updated at the same time.
In case the user forgets to update the SCP ROM firmware, this patch
detects when it still uses the previous version of the communication
protocol. It will then output a comprehensive error message that helps
trouble-shoot the issue.
Change-Id: I7baf8f05ec0b7d8df25e0ee53df61fe7be0207c2
Sandrine Bailleux
authored
on 13 Apr 2015
Dan Handley
committed
on 28 Apr 2015
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Doc updates following platform port reorganization
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Update the User Guide, Porting Guide and Firmware Design documents
to align them with the recent changes made to the FVP and Juno
platform ports.
Also fix some other historical inaccuracies.
Change-Id: I37aba4805f9044b1a047996d3e396c75f4a09176
Dan Handley
committed
on 28 Apr 2015
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2015-03-17 |
Merge pull request #269 from vikramkanigiri/vk/common-cci
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Common driver for ARM cache coherent Interconnects
danh-arm
committed
on 17 Mar 2015
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2015-03-16 |
Common driver for ARM Cache Coherent Interconnects
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Even though both CCI-400 and CCI-500 IPs have different configurations
with respect to the number and types of supported interfaces, their
register offsets and programming sequences are similar. This patch
creates a common driver for enabling and disabling snoop transactions
and DVMs with both the IPs.
New platform ports which implement one of these IPs should use this
common driver. Existing platform ports which implement CCI-400 should
migrate to the common driver as the standalone CCI-400 will be
deprecated in the future.
Change-Id: I3ccd0eb7b062922d2e4a374ff8c21e79fa357556
Vikram Kanigiri
committed
on 16 Mar 2015
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2015-03-10 |
User guide: Add dependency on libssl-dev for cert_create tool
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The 'libssl-dev' package must be installed on the host to build the
certificate generation tool. This patch adds it to the list of
required tools in the User Guide.
Change-Id: I018381fb14b7c2d2bd6f2b7929aaad0571f7eb2e
Sandrine Bailleux
committed
on 10 Mar 2015
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2015-02-04 |
Fix model command line for legacy VE memory map
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The command line options specified in the User Guide to run the AEMv8 Base FVP
with the legacy VE memory map apply only when the model is configured to use GIC
v2.0. This patch adds the 'gicv3.gicv2-only=1' to the command line to ensure
that the right version of GIC is used.
Change-Id: I34c44e19fd42c29818b734ac8f6aa9bf97b4e891
Achin Gupta
committed
on 4 Feb 2015
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2015-02-03 |
TBB: Add documentation for Trusted Board Boot
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This patch updates the user-guide.md with the various build options related to
Trusted Board Boot and steps to build a FIP image which includes this
support. It also adds a trusted-board-boot.md which describes the scope and
design of this feature.
Change-Id: Ifb421268ebf7e06a135684c8ebb04c94835ce061
Achin Gupta
authored
on 25 Jan 2015
Juan Castillo
committed
on 3 Feb 2015
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2015-02-02 |
Merge pull request #253 from danh-arm/dh/deps-for-v1.1
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Move up dependency versions in user guide
danh-arm
committed
on 2 Feb 2015
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Move up dependency versions in user guide
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Move up the version numbers in the user guide of:
* DS-5 (to v5.20)
* EDK2 (to v2.1-rc0)
* Linux Kernel (to 1.3-Juno)
* Linaro file-system (to 14.12)
* Juno SCP binary (to 1.5.0-rc0 within board recovery image 0.10.1).
Also remove duplicate information that is available from the
ARM Connected Community website.
* Base FVP (to 6.2)
* Foundation FVP (to 9.1). Also update the name of the Foundation
FVP binary since it has changed since version 2.1.
Co-Authored-By: Dan Handley <dan.handley@arm.com>
Change-Id: I1cf2f2b1a3f1b997ac905a4ab440876d265698c0
Sandrine Bailleux
authored
on 14 Jan 2015
Dan Handley
committed
on 2 Feb 2015
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Miscellaneous doc fixes for v1.1
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Change-Id: Iaf9d6305edc478d39cf1b37c8a70ccdf723e8ef9
Sandrine Bailleux
committed
on 2 Feb 2015
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2015-01-28 |
Merge pull request #248 from jcastillo-arm/jc/tf-issues/212_1
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Allow BL3-2 to be loaded into the secure region of DRAM
danh-arm
committed
on 28 Jan 2015
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2015-01-26 |
Demonstrate model for routing IRQs to EL3
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This patch provides an option to specify a interrupt routing model
where non-secure interrupts (IRQs) are routed to EL3 instead of S-EL1.
When such an interrupt occurs, the TSPD arranges a return to
the normal world after saving any necessary context. The interrupt
routing model to route IRQs to EL3 is enabled only during STD SMC
processing. Thus the pre-emption of S-EL1 is disabled during Fast SMC
and Secure Interrupt processing.
A new build option TSPD_ROUTE_NS_INT_EL3 is introduced to change
the non secure interrupt target execution level to EL3.
Fixes ARM-software/tf-issues#225
Change-Id: Ia1e779fbbb6d627091e665c73fa6315637cfdd32
Soby Mathew
committed
on 26 Jan 2015
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FVP: Allow BL3-2 to sit in the secure region of DRAM
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This patch allows the secure payload (BL3-2) to be loaded in the
DRAM region secured by the TrustZone controller (top 16 MB of DRAM1).
The location of BL3-2 can be selected at build time by setting the
build flag FVP_TSP_RAM_LOCATION to one of the following options:
- 'tsram' : Trusted SRAM (this is the default option)
- 'tdram' : Trusted DRAM
- 'dram' : Secure region in DRAM1 (top 16MB configured by the
TrustZone controller)
The number of MMU tables in BL3-2 depends on its location in
memory: 3 in case it is loaded in DRAM, 2 otherwise.
Documentation updated accordingly.
Fixes ARM-software/tf-issues#212
Change-Id: I371eef3a4159f06a0c9e3c6c1f4c905b2f93803a
Juan Castillo
committed
on 26 Jan 2015
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2015-01-22 |
Remove coherent memory from the BL memory maps
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This patch extends the build option `USE_COHERENT_MEMORY` to
conditionally remove coherent memory from the memory maps of
all boot loader stages. The patch also adds necessary
documentation for coherent memory removal in firmware-design,
porting and user guides.
Fixes ARM-Software/tf-issues#106
Change-Id: I260e8768c6a5c2efc402f5804a80657d8ce38773
Soby Mathew
authored
on 8 Jan 2015
Dan Handley
committed
on 22 Jan 2015
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2015-01-12 |
Merge pull request #232 from jcastillo-arm/jc/fix_doc_bl31
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Fix reset to BL3-1 instructions in user guide, part 3
danh-arm
committed
on 12 Jan 2015
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Fix reset to BL3-1 instructions in user guide, part 3
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Patch 20d51ca moved the shared data page from the top of the
Trusted SRAM to the bottom, changing the load addresses of BL3-1
and BL3-2.
This patch updates BL3-1 and BL3-2 addresses in the instructions
to run the Trusted Firmware on FVP using BL3-1 as reset vector.
This patch is similar to but distinct from bfb1dd5 and 7ea4c43.
Change-Id: I6b467f9a82360a5e2181db99fea881487de52704
Juan Castillo
committed
on 12 Jan 2015
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Merge pull request #231 from jcastillo-arm/jc/fip_bin
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Specify FIP filename at build time
danh-arm
committed
on 12 Jan 2015
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Merge pull request #230 from sandrine-bailleux/sb/doc-updates
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User Guide: Enable secure memory on Foundation FVP
danh-arm
committed
on 12 Jan 2015
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2015-01-09 |
User Guide: Enable secure memory on Foundation FVP
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Previously, the User Guide recommended launching the Foundation
FVP with the parameter --no-secure-memory, which disabled security
control of the address map. This was due to missing support for
secure memory regions in v1 of the Foundation FVP. This is no longer
needed as secure memory is now supported on the Foundation FVP.
This patch updates the User Guide to recommend enabling secure
memory instead.
Change-Id: Ifae53c10ff6e1c7c6724af20e05a3d3a88f6a5ad
Sandrine Bailleux
committed
on 9 Jan 2015
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2015-01-07 |
Create Table of Content links in markdown files
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Fixes arm-software/tf-issues#276
Joakim Bech
committed
on 7 Jan 2015
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2015-01-06 |
Specify FIP filename at build time
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This patch allows to define the name of the FIP at build time by
defining the FIP_NAME variable. If FIP_NAME is not defined, default
name 'fip.bin' is used.
Documentation updated accordingly.
Change-Id: Ic41f42aac379b0c958b3dfd02863ba8ba7108710
Juan Castillo
committed
on 6 Jan 2015
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2014-10-28 |
Merge pull request #217 from jcastillo-arm/jc/tf-issues/257
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FVP: keep shared data in Trusted SRAM
danh-arm
committed
on 28 Oct 2014
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2014-10-22 |
FVP: keep shared data in Trusted SRAM
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This patch deprecates the build option to relocate the shared data
into Trusted DRAM in FVP. After this change, shared data is always
located at the base of Trusted SRAM. This reduces the complexity
of the memory map and the number of combinations in the build
options.
Fixes ARM-software/tf-issues#257
Change-Id: I68426472567b9d8c6d22d8884cb816f6b61bcbd3
Juan Castillo
committed
on 22 Oct 2014
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2014-10-14 |
Juno: Reserve some DDR-DRAM for secure use
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This patch configures the TrustZone Controller in Juno to split
the 2GB DDR-DRAM memory at 0x80000000 into Secure and Non-Secure
regions:
- Secure DDR-DRAM: top 16 MB, except for the last 2 MB which are
used by the SCP for DDR retraining
- Non-Secure DDR-DRAM: remaining DRAM starting at base address
Build option PLAT_TSP_LOCATION selects the location of the secure
payload (BL3-2):
- 'tsram' : Trusted SRAM (default option)
- 'dram' : Secure region in the DDR-DRAM (set by the TrustZone
controller)
The MMU memory map has been updated to give BL2 permission to load
BL3-2 into the DDR-DRAM secure region.
Fixes ARM-software/tf-issues#233
Change-Id: I6843fc32ef90aadd3ea6ac4c7f314f8ecbd5d07b
Juan Castillo
committed
on 14 Oct 2014
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2014-09-16 |
Add support for specifying pre-built BL binaries in Makefile
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This patch adds support for supplying pre-built BL binaries for BL2,
BL3-1 and BL3-2 during trusted firmware build. Specifying BLx = <path_to_BLx>
in the build command line, where 'x' is any one of BL2, BL3-1 or BL3-2, will
skip building that BL stage from source and include the specified binary in
final fip image.
This patch also makes BL3-3 binary for FIP optional depending on the
value of 'NEED_BL33' flag which is defined by the platform.
Fixes ARM-software/tf-issues#244
Fixes ARM-software/tf-issues#245
Change-Id: I3ebe1d4901f8b857e8bb51372290978a3323bfe7
Soby Mathew
committed
on 16 Sep 2014
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2014-08-28 |
Fix minor issues in user guide
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* Fix broken link to SCP download.
* Remove requirement to install `ia32-libs`. This package is no
longer available in current versions of Ubuntu and is no
longer required when using the Linaro toolchain.
Change-Id: I9823d535a1d69136685754b7707b73e1eef0978d
Dan Handley
committed
on 28 Aug 2014
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2014-08-27 |
Miscellaneous documentation fixes
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This patch gathers miscellaneous minor fixes to the documentation, and comments
in the source code.
Change-Id: I631e3dda5abafa2d90f464edaee069a1e58b751b
Co-Authored-By: Soby Mathew <soby.mathew@arm.com>
Co-Authored-By: Dan Handley <dan.handley@arm.com>
Sandrine Bailleux
authored
on 6 Aug 2014
Dan Handley
committed
on 27 Aug 2014
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Merge pull request #200 from danh-arm/dh/fix-reset-to-bl31-part2
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Fix reset to BL3-1 instructions in user guide, part 2
danh-arm
committed
on 27 Aug 2014
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