LuminaSensum/arm-trusted-firmware

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LuminaSensum / arm-trusted-firmware

2020-01-30	dcd03ce Browse files » Merge changes from topic "sb/select-cot" into integration ... * changes: Introduce COT build option cert_create: Remove references to TBBR in common code cert_create: Introduce COT build option cert_create: Introduce TBBR CoT makefile Sandrine Bailleux authored on 30 Jan 2020 TrustedFirmware Code Review committed on 30 Jan 2020
2020-01-29	b1d810b Browse files » Merge "qemu: Implement PSCI_CPU_OFF." into integration Soby Mathew authored on 29 Jan 2020 TrustedFirmware Code Review committed on 29 Jan 2020
	458dde3 Browse files » Merge "T589: Fix insufficient ordering guarantees in bakery lock" into integration Soby Mathew authored on 29 Jan 2020 TrustedFirmware Code Review committed on 29 Jan 2020
	3bff910 Browse files » Introduce COT build option ... Allows to select the chain of trust to use when the Trusted Boot feature is enabled. This affects both the cert_create tool and the firmware itself. Right now, the only available CoT is TBBR. Change-Id: I7ab54e66508a1416cb3fcd3dfb0f055696763b3d Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 29 Jan 2020
	067f7e9 Browse files » cert_create: Remove references to TBBR in common code ... In preparation of supporting alternate chains of trust, reword comments and error messages that explicitly mentioned TBBR. Change-Id: I85a0b08e16d0cd82f3b767fcc092d1f20f45939f Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 29 Jan 2020
	43743ea Browse files » cert_create: Introduce COT build option ... It allows to select the desired chain of trust. Right now, only the TBBR CoT is available. At this stage, this build option only affects the tool itself. It is not plugged into the rest of the build system yet. To use it: > make -C tools/cert_create COT=tbbr Change-Id: I4484418f76d3c7b330d8653c978499a181534dcd Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 29 Jan 2020
	3b24b66 Browse files » cert_create: Introduce TBBR CoT makefile ... Move all TBBR-specific stuff out of the tool's makefile into a sub-makefile. This will make it easier to define and select an alternate chain of trust in the future. Change-Id: I92e366a1999b74cf51127d1771b64b807cd94b29 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 29 Jan 2020
	33e8c56 Browse files » qemu: Implement PSCI_CPU_OFF. ... This is based on the rpi implementation from https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/2746. Signed-off-by: Andrew Walbran <qwandor@google.com> Change-Id: I5fe324fcd9d5e232091e01267ea12147c46bc9c1 Andrew Walbran committed on 29 Jan 2020
	8efec9e Browse files » Merge changes I0fb7cf79,Ia8eb4710 into integration ... * changes: qemu: Implement qemu_system_off via semihosting. qemu: Support ARM_LINUX_KERNEL_AS_BL33 to pass FDT address. Soby Mathew authored on 29 Jan 2020 TrustedFirmware Code Review committed on 29 Jan 2020
	c1f118f Browse files » Merge "Enable -Wredundant-decls warning check" into integration Soby Mathew authored on 29 Jan 2020 TrustedFirmware Code Review committed on 29 Jan 2020
2020-01-28	b012454 Browse files » Merge "Measured Boot: add function for hash calculation" into integration Mark Dykes authored on 28 Jan 2020 TrustedFirmware Code Review committed on 28 Jan 2020
	ca661a0 Browse files » Enable -Wredundant-decls warning check ... This flag warns if anything is declared more than once in the same scope, even in cases where multiple declaration is valid and changes nothing. Consequently, this patch also fixes the issues reported by this flag. Consider the following two lines of code from two different source files(bl_common.h and bl31_plat_setup.c): IMPORT_SYM(uintptr_t, __RO_START__, BL_CODE_BASE); IMPORT_SYM(unsigned long, __RO_START__, BL2_RO_BASE); The IMPORT_SYM macro which actually imports a linker symbol as a C expression. The macro defines the __RO_START__ as an extern variable twice, one for each instance. __RO_START__ symbol is defined by the linker script to mark the start of the Read-Only area of the memory map. Essentially, the platform code redefines the linker symbol with a different (relevant) name rather than using the standard symbol. A simple solution to fix this issue in the platform code for redundant declarations warning is to remove the second IMPORT_SYM and replace it with following assignment static const unsigned long BL2_RO_BASE = BL_CODE_BASE; Change-Id: If4835d1ee462d52b75e5afd2a59b64828707c5aa Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Madhukar Pappireddy committed on 28 Jan 2020
	8c10529 Browse files » Measured Boot: add function for hash calculation ... This patch adds 'calc_hash' function using Mbed TLS library required for Measured Boot support. Change-Id: Ifc5aee0162d04db58ec6391e0726a526f29a52bb Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Alexei Fedorov committed on 28 Jan 2020
	29763ac Browse files » Merge changes from topic "ti-cluster-power" into integration ... * changes: ti: k3: drivers: ti_sci: Put sequence number in coherent memory ti: k3: drivers: ti_sci: Remove indirect structure of const data ti: k3: common: Enable ARM cluster power down ti: k3: common: Rename device IDs to be more consistent Soby Mathew authored on 28 Jan 2020 TrustedFirmware Code Review committed on 28 Jan 2020
	7cd731b Browse files » Merge "plat/arm/sgi: move topology information to board folder" into integration Manish Pandey authored on 28 Jan 2020 TrustedFirmware Code Review committed on 28 Jan 2020
	9901858 Browse files » Merge "Tegra194: enable spe-console functionality" into integration Sandrine Bailleux authored on 28 Jan 2020 TrustedFirmware Code Review committed on 28 Jan 2020
	ffd58cc Browse files » Tegra194: enable spe-console functionality ... This patch enables the config to switch to the console provided by the SPE firmware. Change-Id: I5a3bed09ee1e84f958d0925501d1a79fb7f694de Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar authored on 1 Dec 2017 Sandrine Bailleux committed on 28 Jan 2020
	91ff490 Browse files » Merge "Neovers N1: added support to update presence of External LLC" into integration Manish Pandey authored on 28 Jan 2020 TrustedFirmware Code Review committed on 28 Jan 2020
2020-01-27	32967a3 Browse files » ti: k3: drivers: ti_sci: Put sequence number in coherent memory ... The current message sequence number is accessed both with caches on and off so put this memory in the un-cached coherent section so accesses are consistent and coherency is maintained. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: Ieeefefeaffc691e4e4c4de7c74490d50ff9de807 Andrew F. Davis committed on 27 Jan 2020
	592ede2 Browse files » ti: k3: drivers: ti_sci: Remove indirect structure of const data ... The 'info' structure contained what is only static data for this implementation of TI-SCI. Remove this indirection and remove the struct. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I2328fddf388bf7d56a56bd673c080e78c86fe072 Andrew F. Davis committed on 27 Jan 2020
	586621f Browse files » ti: k3: common: Enable ARM cluster power down ... When all cores in a cluster are powered down the parent cluster can be also powered down. When the last core has requested powering down follow by sending the cluster power down sequence to the system power controller firmware. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I0ffeb339852c66ef62743aecd3e17ca20bad6216 Andrew F. Davis committed on 27 Jan 2020
	9f49a17 Browse files » ti: k3: common: Rename device IDs to be more consistent ... The core number is called 'core_id' but the processor and device IDs are called 'proc' and 'device'. Rename these to make them less confusing. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I3d7c6dddd7aa37b5dee1aa9689ce31730e9c3b59 Andrew F. Davis committed on 27 Jan 2020
	c001891 Browse files » T589: Fix insufficient ordering guarantees in bakery lock ... bakery_lock_get() uses DMB LD after lock acquisition and bakery_lock_release() uses DMB ST before releasing the lock. This is insufficient in both cases. With just DMB LD, stores in the critical section can be reordered before the DMB LD which could mean writes in the critical section completing before the lock has been acquired successfully. Similarly, with just DMB ST, a load in the critical section could be reordered after the the DMB ST. DMB is the least expensive barrier that can provide the required ordering. Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@icloud.com> Change-Id: Ieb74cbf5b76b09e1789331b71f37f7c660221b0e Raghu Krishnamurthy committed on 27 Jan 2020
	0281e60 Browse files » Merge changes from topic "pie" into integration ... * changes: uniphier: make all BL images completely position-independent uniphier: make uniphier_mmap_setup() work with PIE uniphier: pass SCP base address as a function parameter uniphier: set buffer offset and length for io_block dynamically uniphier: use more mmap_add_dynamic_region() for loading images bl_common: add BL_END macro uniphier: turn on ENABLE_PIE TSP: add PIE support BL2_AT_EL3: add PIE support BL31: discard .dynsym .dynstr .hash sections to make ENABLE_PIE work PIE: pass PIE options only to BL31 Build: support per-BL LDFLAGS Soby Mathew authored on 27 Jan 2020 TrustedFirmware Code Review committed on 27 Jan 2020
	f2d6b4e Browse files » Neovers N1: added support to update presence of External LLC ... CPUECTLR_EL1.EXTLLC bit indicates the presense of internal or external last level cache(LLC) in the system, the reset value is internal LLC. To cater for the platforms(like N1SDP) which has external LLC present introduce a new build option 'NEOVERSE_N1_EXTERNAL_LLC' which can be enabled by platform port. Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ibf475fcd6fd44401897a71600f4eafe989921363 Manish Pandey committed on 27 Jan 2020
	a9fbf13 Browse files » plat/arm/sgi: move topology information to board folder ... The platform topology description of the upcoming Arm's RD platforms have different topology than those listed in the sgi_topology.c file. So instead of adding platform specific topology into existing sgi_topology.c file, those can be added to respective board files. In order to maintain consistency with the upcoming platforms, move the existing platform topology description to respective board files. Change-Id: I4689c7d24cd0c75a3dc234370c34a85c08598abb Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Vijayenthiran Subramaniam committed on 27 Jan 2020
	432e9ee Browse files » Merge "plat/sgm: Always use SCMI for SGM platforms" into integration Manish Pandey authored on 27 Jan 2020 TrustedFirmware Code Review committed on 27 Jan 2020
2020-01-24	9054018 Browse files » Merge "xilinx: Unify Platform specific defines for PSCI module" into integration Mark Dykes authored on 24 Jan 2020 TrustedFirmware Code Review committed on 24 Jan 2020
	f2aa4e8 Browse files » plat/sgm: Always use SCMI for SGM platforms ... As on SGI platforms, SCPI is unsupported on SGM platforms. Change-Id: I556ed095b9eb55b72447230ee2725d3c76160a08 Signed-off-by: Chris Kay <chris.kay@arm.com> Chris Kay authored on 23 Apr 2019 Soby Mathew committed on 24 Jan 2020
	6cdef9b Browse files » xilinx: Unify Platform specific defines for PSCI module ... PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I76f5535f1cbdaf3fc1235cd824111d9afe8f7e1b Deepika Bhavnani committed on 24 Jan 2020