LuminaSensum/arm-trusted-firmware

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LuminaSensum / arm-trusted-firmware

2017-04-12	f07d398 Browse files » Merge pull request #885 from antonio-nino-diaz-arm/an/console-flush ... Implement console_flush() davidcunado-arm authored on 12 Apr 2017 GitHub committed on 12 Apr 2017
2017-04-07	45cd814 Browse files » Merge pull request #892 from rockchip-linux/fixes-a-typo ... rockchip/rk3399: the printf changed to tf_printf for console output davidcunado-arm authored on 7 Apr 2017 GitHub committed on 7 Apr 2017
2017-04-07	264521b Browse files » Merge pull request #891 from vwadekar/tegra186-platform-support-v4 ... Tegra186 platform support v4 davidcunado-arm authored on 7 Apr 2017 GitHub committed on 7 Apr 2017
2017-04-06	01178e8 Browse files » rockchip/rk3399: changed printf/tf_printf for console output ... The printf() isn't used by the firmware itself, just by the tools under the ./tools/ folder. Then tf_printf will unconditionally print. Remove the unused print_dram_status_info() function. Change-Id: Ie699ccb54a5be9a2cbbd7b8d4193b57075a2f57a Signed-off-by: Caesar Wang <wxt@rock-chips.com> Caesar Wang committed on 6 Apr 2017
	3b68c09 Browse files » Merge pull request #888 from douglas-raillard-arm/dr/fix_ULL_issue ... Fix ARM_BL31_IN_DRAM build davidcunado-arm authored on 6 Apr 2017 GitHub committed on 6 Apr 2017
	38fc7ed Browse files » Merge pull request #889 from paulkocialkowski/integration ... rockchip: Remove unused rockchip_pd_pwr_down_wfi function davidcunado-arm authored on 6 Apr 2017 GitHub committed on 6 Apr 2017
	ed75625 Browse files » Merge pull request #886 from dp-arm/dp/stack-protector ... Add support for GCC stack protection davidcunado-arm authored on 6 Apr 2017 GitHub committed on 6 Apr 2017
2017-04-05	90e0ffd Browse files » Merge pull request #882 from douglas-raillard-arm/dr/review_juno_errata ... Enable all A53 and A57 errata workarounds for Juno davidcunado-arm authored on 5 Apr 2017 GitHub committed on 5 Apr 2017
	2dd7d41 Browse files » Tegra186: move TSA macros to tegra_def.h ... This patch moves the TSA block's macros from memctrl_v2.h to tegra_def.h in the Tegra186 tree. Change-Id: I8b45dd3905c5d1f33ffb36d8b2de72aeb06674aa Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 5 Apr 2017
	0258840 Browse files » Tegra: drivers: memctrl: move chip specific defines to tegra_def.h ... This patch moves the chip specific memory controller driver defines to the appropriate tegra_def.h files, for future compatibility. Change-Id: I3179fb771d8b32e913ca29bd94af95f4b2fc1961 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 5 Apr 2017
	dec349c Browse files » Tegra186: move platform specific MCE defines to tegra_def.h ... This patch moves the MCE's configurable parameters to tegra_def.h for the Tegra186 SoC, to allow forward compatiblity. Change-Id: If8660c1c09908a4064dbb67d5ca4fb78389cab13 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 5 Apr 2017
	d81938a Browse files » Tegra: memctrl_v2: no SID override for AON ... Remove stream ID overrides for AON. AON drives its own stream ID when accesing IOVA memory. However, it needs to use a physical stream ID when accesing GSC memory. Overriding stream ids prevents AON from accessing GSC memory, so remove them to allow AON to access GSCs. Change-Id: Ia2b11014d9780c4546b5e781621ae4cd413735cc Signed-off-by: Mustafa Yigit Bilgen <mbilgen@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Mustafa Yigit Bilgen authored on 17 Nov 2016 Varun Wadekar committed on 5 Apr 2017
	396a9b8 Browse files » Tegra186: memctrl_v2: remove APE overrides for chip verification ... This patch reverts the APE overrides added for chip verification. Change-Id: Ib85560934d63f6e41e95ef6898a341f24761a517 Signed-off-by: Vivek Aseeja <vaseeja@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Vivek Aseeja authored on 22 Aug 2016 Varun Wadekar committed on 5 Apr 2017
	5ea1fe5 Browse files » Tegra186: use MSB of wake_time ... This patch updates wake time of the cpu to use the MSBs and zero out the LSB's. Only 24 out of 32 bits are currently passed through the PSCI interface. Previously all the LSB's were used. Change-Id: Ie2d9d1bf6e3003dd47526a124f64e6ad555d2371 Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Krishna Sitaraman authored on 18 Aug 2016 Varun Wadekar committed on 5 Apr 2017
	a259293 Browse files » Tegra186: Update API for reset vector ARI ... The TEGRA_ARI_COPY_MISCREG_AA64_RST ARI should be called with request_lo/hi set to zero. MTS automatically takes the reset vector from MISCREG_AA64_RST register and does not need it to be passed as parameters. This patch updates the API and the caller function accordingly. Change-Id: Ie3e3402d93951102239d988ca9f0cdf94f290d2f Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Krishna Sitaraman authored on 2 Sep 2016 Varun Wadekar committed on 5 Apr 2017
	322b00f Browse files » Tegra186: clean CPU wake times from L2 cache ... When entering C7, ATF disables caches and flushes the L1 cache. However, wake_time[cpu] can still remain in the L2 cache, causing later reads to it to fetch from DRAM. This will read stale values. Fix this by aligning wake_time[cpu] to cache lines, and explicitly cleaning it before disabling caches. Change-Id: Id73d095b479677595a6b3dd0abb240a1fef5f311 Signed-off-by: Mustafa Yigit Bilgen <mbilgen@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Mustafa Yigit Bilgen authored on 2 Sep 2016 Varun Wadekar committed on 5 Apr 2017
	ac26b96 Browse files » Tegra186: update t18x_ari.h to v3.0 ... This patch updates the ARI header to version 3.0 Change-Id: I7cfe0c61c80a6b78625232135dd63393602d32fe Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Krishna Sitaraman authored on 28 Jul 2016 Varun Wadekar committed on 5 Apr 2017
	12517ca Browse files » Merge pull request #881 from davidcunado-arm/dc/update_userguide ... Upgrade mbed TLS version davidcunado-arm authored on 5 Apr 2017 GitHub committed on 5 Apr 2017
	5dff210 Browse files » Merge pull request #877 from soby-mathew/sm/build_opt_checks ... Include all makefiles before build option checks davidcunado-arm authored on 5 Apr 2017 GitHub committed on 5 Apr 2017
	2562145 Browse files » Tegra186: trampoline: update "System Suspend" exit criteria ... The TZRAM memory loses its state during "System Suspend". This patch check if TZRAM base address contains valid data, to decide if the system is exiting from "System Suspend". To enable TZDRAM encryption, the Memory Controller's TZDRAM base/size registers would be populated by the BPMP when the system "wakes up". Change-Id: I5fc8ba1ae3bce12f0ece493f6f9f5f4d92a46344 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 5 Apr 2017
	5345189 Browse files » Tegra186: Add smc handler for coresight clock gating ... This change adds function to invoke for MISC_CCPLEX ARI calls and the corresponding smc handler. This can be used to enable/disable Coresight clock gating. Change-Id: I4bc17aa478a46c29bfe17fd74f839a383ee2b644 Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Krishna Sitaraman authored on 19 Jul 2016 Varun Wadekar committed on 5 Apr 2017
	719f3ec Browse files » Tegra: memctrl_v2: save TZDRAM settings to secure scratch registers ... Save TZDRAM settings for SC7 resume firmware to restore. SECURITY_BOM: MC_SECURITY_CFG0_0 = SECURE_RSV55_SCRATCH_0 SECURITY_BOM_HI: MC_SECURITY_CFG3_0 = SECURE_RSV55_SCRATCH_1 SECURITY_SIZE_MB: MC_SECURITY_CFG1_0 = SECURE_RSV54_SCRATCH_1 Change-Id: I78e891d9ebf576ff2a17ff87cf3aff4030ee11b8 Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Harvey Hsieh authored on 29 Jul 2016 Varun Wadekar committed on 5 Apr 2017
	6ef90b9 Browse files » Tegra186: mce: fix return value for enum features ari ... This patch fixes the incorrect return value that was being passed back for the ENUM_FEATURES ARI call. Change-Id: I3842c6ce27ea24698608830cf4c12cfa7ff64421 Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Krishna Sitaraman authored on 27 Jul 2016 Varun Wadekar committed on 5 Apr 2017
	1000711 Browse files » Tegra186: mce: clear reserved fields for ARI calls ... This patch clears the unused or reserved ARI input registers before issuing the actual ARI command. Change-Id: I454b86566bfe088049a5c63527c1323d7b25248a Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Krishna Sitaraman authored on 28 Jul 2016 Varun Wadekar committed on 5 Apr 2017
	331f8a0 Browse files » Merge pull request #876 from soby-mathew/sm/refactor_header ... Re-factor header files for easier PSCI library integration davidcunado-arm authored on 5 Apr 2017 GitHub committed on 5 Apr 2017
	8272067 Browse files » Merge pull request #884 from vwadekar/tegra186-platform-support-v3 ... Tegra186 platform support v3 davidcunado-arm authored on 5 Apr 2017 GitHub committed on 5 Apr 2017
2017-04-04	b6dcbf5 Browse files » rockchip: Remove unused rockchip_pd_pwr_down_wfi function ... The rockchip_pd_pwr_down_wfi function is currently unused, which may trigger compiler warnings or errors. Remove it. Change-Id: I7e1b0ae092e8855528ac2065ecefc8bd45305f31 Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Paul Kocialkowski committed on 4 Apr 2017
2017-04-03	f9608bc Browse files » Fix ARM_BL31_IN_DRAM build ... Some header files using the ULL() macro were not directly including utils.h where the macro definition resides. As a consequence, a linker script with values using this macro did not see the macro definition and kept the "ULL(<value>)" call in the preprocessed file, which lead to link error. Files using ULL() macro now include utils.h directly. Change-Id: I433a7f36bd21a156c20e69bc2a2bb406140ebdf9 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com> Douglas Raillard committed on 3 Apr 2017
2017-03-31	ffe102c Browse files » Merge pull request #874 from dp-arm/dp/mbed-macros ... mbedtls: Namespace TF specific macros davidcunado-arm authored on 31 Mar 2017 GitHub committed on 31 Mar 2017
2017-03-31	e6d2aea Browse files » Juno: Initialize stack protector canary from the trusted entropy source ... Change-Id: I7f3e4bfd46613c6311ba4015d56705414fd6feab Signed-off-by: dp-arm <dimitris.papastamos@arm.com> dp-arm committed on 31 Mar 2017