kvx: remove duplicated dtb symbols ...

dtb symbols (__dtb_start, __dtb_end) are already defined using
RO_DATA_SECTION. This duplicated dtb section is a leftover used by
Kalray internal tools to patch the dtb when loading the elf on a
target. Remove it to keep only one symbol definition.

Signed-off-by: Clement Leger <cleger@kalray.eu>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

kvx: add support for elf loading using bootm ...

In order to boot elfs files, add bootm command support for kvx. This support
can boot elf files using bootm elf support. initrd and device-tree handling
is also included and loads them after the elf file load address.

Signed-off-by: Clement Leger <cleger@kalray.eu>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

kvx: add I-cache and D-cache synchronisation ...

Before booting, we must make sure the I-cache is synchronized with the
D-cache to execute loaded instructions. In order to do that, add a
function which execute a fence to ensure every memory accesses have
been committed out of processor pipeline to memory and then invalidate
I-cache to reload from memory.

Signed-off-by: Clement Leger <cleger@kalray.eu>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: module: Allow modules outside of bl range ...

Unlike the Linux kernel, barebox does not have a dedicated heap for
storing modules. Therefore, if the system memory configuration places
the general heap further away than can be reached by a 'bl' instruction
(24 bits of address, or 16 MiB), then the module relocations will fail
due to being out of range.

Allocate PLTs when loading modules so that jumps and calls whose
targets are too far away for their relative offsets to be encoded
in the instructions themselves can be bounced via veneers in the
module's PLT. The modules will use slightly more memory, but after
rounding up to page size, the actual memory footprint is usually
the same.

Adoption of Linux commits:

66e94ba3c8ea ARM: kernel: avoid brute force search on PLT generation
1031a7e674d1 ARM: kernel: sort relocation sections before allocating PLTs
05123fef0982 ARM: kernel: allocate PLT entries only for external symbols
35fa91eed817 ARM: kernel: merge core and init PLTs
7d485f647c1f ARM: 8220/1: allow modules outside of bl range

Signed-off-by: David Dgien <dgienda125@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: elf: Add THM relocation types ...

Signed-off-by: David Dgien <dgienda125@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: makefile: Fix compiler flag variable ...

In order for ARM modules to compile with the correct relocation types,
they must be built without -fPIE. Move -fPIE from KBUILD_CPPFLAGS to
KBUILD_CFLAGS_KERNEL so that the flag is only included when compiling
files being built into the barebox image.

Signed-off-by: David Dgien <dgienda125@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: dts: vf610-zii-dev-rev-c: Expose fiber EEPROM modules ...

EEPROM on fiber optic modules present on Rev C ZII VF610 Dev board
can be exposed as AT24 compatible devices. Add corresponding DT nodes
needed for that.

Signed-off-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

treewide: make use of PTR_ERR_OR_ZERO ...

PTR_ERR_OR_ZERO is designed to replace boiler plate like:

	if (IS_ERR(x))
		return PTR_ERR(x);
	return 0;

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

kbuild: fix typo in --no-whole-archive flag ...

"whole" was replaced with "while" during a previous patch. Fix this flag
to allow building correctly.

Fixes 0a78b33954 ("kbuild: switch over to thin archive")
Signed-off-by: Clement Leger <cleger@kalray.eu>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: at91: choose proper parent for both MCI clocks ...

When booting from SDMMC0, Use of SDMMC1 fails with:
ERROR: clk: couldn't set sdmmc1_gclk clk rate to 480000000 (-22), current rate: 32768

This is because the first stage bootloader only reparents the boot SDMMC
instance and barebox does no automatic reparenting for the other one.

Force both clocks to have a suitable parent.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: at91: add at91sam9/sama5 reset reason detection ...

The reset controller status register contains information about the last
reset's cause. Tell barebox about it.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: socfpga: dts: remove unused nodes and phandles ...

The phandles are unreferenced anywhere. They are likely a remnant of
copy and paste from another device tree that makes use of them, e.g. the
socfpga_cyclone5_socrates.dts. Drop them.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: zynqmp: dts: drop now superfluous zynqmp.dtsi ...

zynqmp.dtsi's only node is now available in the upstream dtsi at same
path and same contents, so we can drop the file again.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: mx53-qsrb: dts: remove now-superfluous override ...

This gpio-keys node is now available upstream long with the
GPIO_ACTIVE_LOW flag, so we can drop the barebox override.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX7: dts: replace commented-out code with status = "disabled" ...

A status = "disabled" node should act the same as if it were
uncommented, with the difference that a board that does have the
resistor populated could easily fixup the status.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: layerscape: dts: combine fsl-ls1046a-rdb.dts aliases nodes ...

This was likely overlooked because they were separate commits.
Combine them now. No functional change.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6UL: dts: remove defunct override of pico-hobbit memory node ...

Prior to 8226f7f90973 ("of: base: parse all available memory nodes"),
barebox first looked at a /memory node, then at a node with a
device_type = "memory" property when probing available memory banks from
device tree. Linux instead only considered nodes with device_type =
"memory". The imx6ul-pico-hobbit predates the change in barebox behavior,
so it's unclear what is gained from dropping device_type = "memory" as
barebox used to parse the node by name anyway and Linux only saw the new
fixed up node.

Since then the Linux device tree has been split into a SoM and carrier
board device tree and the node name is now called memory@80000000 with
a size of 0 in the reg property. Because it's already used for boards
with differing memory size, we assume this will remain so and thus we
just drop the defunct barebox memory node override.

Cc: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mvebu: remove reference to non-existant node ...

The container node of the leds has never had the name gpio_leds,
so there is no regression here, it just never worked.
Instead of fixing it, just drop it.

Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX7: warp: drop duplicate memory node ...

The upstream device tree already features a memory node with the correct
size, but with the name memory@80000000. Drop the differently-named
barebox node.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: dts: reference nodes to extend by phandles instead ...

Many device trees upstream have moved to memory@BASE_ADDRESS for the
memory node instead of a unit-name-less memory node. This has resulted
in breakage[1] in barebox, because some device trees feature an upstream
memory size that's not available in all variants and the barebox device
tree must override it, not create a second correct node next to the broken
one and risk of_add_memory allocating banks with bogus sizes.

To avoid this happening in future, to memory or to other nodes, extension
of nodes should happen via phandles throughout, because a phandle is assumed
to be more stable and if one is removed a compile error results instead
of creating a new node somewhere. For nodes lacking a phandle, we can
use the &{/path} syntax to declare an anonymous phandle that will fail
to compile when the upstream path changes. This is better than having
devices fail to boot at runtime.

[1]: 0d26ce1c11a1 ("ARM: Phytec phyFLEX i.MX6: delete wrong memory node")

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: at91: dts: extend, don't create anew, pinctrl node ...

The pinctrl device is also on the APB in the base device tree. The
barebox device tree wrongly creates a new one top-level under /.
Move it to the correct location, so the upstream node is extended.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: vexpress: dts: fix barebox partitioning breakage ...

There is no /smb@4000000 node upstream any longer as it was
renamed with the 8d158e1a4091 ("dts: update to v5.7-rc1") sync.

Adjust the barebox device tree accordingly. It's likely that this
resulted in barebox v2020.06.0 state, environment and update breakage on
the vexpress boards.

Cc: Roland Hieber <rhi@pengutronix.de>
Fixes: 8d158e1a4091 ("dts: update to v5.7-rc1")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: dts: align all applicable memory nodes with spec and convention ...

The spec[1] says that top level memory nodes `shall have device_type =
"memory"'. Since 8226f7f9 ("of: base: parse all available memory nodes"),
we parse only nodes with device_type = "memory", so we should add the
device_type property where ever it's missing. When the nodes were first
added, this wasn't an issue because the skeleton.dtsi defined a memory
skeleton with correct device_type, but this was removed upstream and
imported into barebox along with 1dc748b3 ("dts: update to v5.1-rc1").

Upstream device trees with a memory node were adapted to have
device_type = "memory" in-line. This wasn't the case for nodes defined
only within barebox. Rectify this now and rename the nodes to feature a
unit name as well to be aligned with the upstream trend.

[1]: https://github.com/devicetree-org/devicetree-specification/releases/download/v0.3/devicetree-specification-v0.3.pdf

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: dts: fix now duplicate memory nodes ...

With the upstream migration to memory@BASE_ADDRESS naming scheme in the
device tree of some SoC families, we now have multiple overlapping memory
nodes in some of the barebox device trees. Rename the defunct overrides, so
they once again override the upstream nodes.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX50: fix renamed node reference ...

There is no /soc/aips@50000000 node upstream any longer as it was
renamed with the 8d158e1a4091 ("dts: update to v5.7-rc1") sync.

Adjust the barebox device tree accordingly. It's likely that this
resulted in barebox v2020.06.0 USB connectivity breakage for the
i.MX50's second USB PHY.

Fixes: 8d158e1a4091 ("dts: update to v5.7-rc1")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: rpi: dts: fix MMIO resources clash breaking boot ...

The rpi3b device tree specifies 1G of RAM in the memory node, but maps
the highest 16M of RAM's physical address range for peripheral use.

When support for device tree probing was first added for the rpi3b
in e8fab18835a1 ("ARM: rpi: switch to DT probe and multi-image build"),
it had a memory { } node overriding the kernel node size with 0, so the
size is computed later correctly.

1dc748b3b202 ("dts: update to v5.1-rc1") came and renamed the upstream
memory { } node to memory@0. So instead of overriding the old, we
now created a second dummy along with the broken node.
barebox did only parse the dummy, so it continued to limp along.

8226f7f90973 ("of: base: parse all available memory nodes") started
considering both nodes and rendered barebox v2020.05.0 unable to start
up on the rpi3b because of the conflict between RAM range and peripherals
like the bcm2835_mbox caused by parsing the broken memory node.

At least one board also was broken for the same reason[1], so a more
robust approach is in order. For nodes that lack a phandle, the
&{/path} syntax can be used instead. This has the benefit that should
the path disappear in future, a compile failure would result.

[1] 0d26ce1c11a1 ("ARM: Phytec phyFLEX i.MX6: delete wrong memory node")

Fixes: 1dc748b3b202 ("dts: update to v5.1-rc1")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MIPS: AR9331: OKUD Max9331 ...

Oleksij and Kevin's Useless Devices.
        O&KUD Max9331

 AR9331 400MHz MIPS
   64M DRAM
   16M SPI Flash
    4G USB Nand Flash
     3 User LEDs
     3 Ports(1Wan/2Lan)
     1 TTL Debug Uart

Signed-off-by: Du Huanpeng <u74147@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: Enable new boards in imx_v7_defconfig ...

We got a few new boards until we last updated imx_v7_defconfig. Enable
them.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: add imx6 based Protonic boads ...

Add initial support for 15 i.MX6 based Protonic boards.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: dts: imx6: add Protonic boards ...

This DTS will be replaced by kernel version

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>