Fix C accessors to GIC distributor registers with set/clear semantics
This patch fixes C accessors to GIC registers that follow a set/clear semantic to change the state of an interrupt, instead of read/write/modify. These registers are: Set-Enable Clear-Enable Set-Pending Clear-Pending Set-Active Clear-Active For instance, to enable an interrupt we write a one to the corresponding bit in the Set-Enable register, whereas to disable it we write a one to the corresponding bit in the Clear-Enable register. Fixes ARM-software/tf-issues#137 Change-Id: I3b66bad94d0b28e0fe08c9042bac0bf5ffa07944
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drivers/arm/gic/gic_v2.c |
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