Limit BL3-1 read/write access to SRAM
At present BL3-1 has access to all of the SRAM, including
regions that are mapped as read-only and non-cacheable by other
firmware images.

This patch restricts BL3-1 to only be able to read/write from
memory used for its own data sections

Change-Id: I26cda1b9ba803d91a9eacda768f3ce7032c6db94

Conflicts:

	plat/fvp/bl31_plat_setup.c
1 parent 399fb08 commit 445fe84f988f61c01503a12eff591bc97dad06cd
@Andrew Thoelke Andrew Thoelke authored on 22 May 2014
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plat/fvp/bl31_plat_setup.c