Fix the disable

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LuminaSensum / arm-trusted-firmware

Browse code Fix the disable_mmu code Remove the hard coding of all the MMU related registers with 0 and disable MMU by clearing the M and C bit in SCTLR_ELx Change-Id: I4a0b1bb14a604734b74c32eb31315d8504a7b8d8 WIP_v2.3-LS master v2.2-LS v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3 v2.2-rc2 v2.2-rc1 v2.2-rc0 v2.2 v2.1-rc1 v2.1-rc0 v2.1 v2.0-rc0 v2.0 v1.6-rc1 v1.6-rc0 v1.6 v1.5-rc3 v1.5-rc2 v1.5-rc1 v1.5-rc0 v1.5 v1.4-rc0 v1.4 v1.3_rc2 v1.3_rc1 v1.3-rc0 v1.3 v1.2-rc0 v1.2 v1.1-rc3 v1.1-rc2 v1.1-rc1 v1.1-rc0 v1.1-Juno-0.1 v1.1 v1.0-rc0 v1.0 v0.4-rc2 v0.4-rc1 v0.4-Juno-0.6-rc1 v0.4-Juno-0.6-rc0 v0.4-Juno-0.5-rc1 v0.4-Juno-0.5-rc0 v0.4-Juno-0.5 v0.4-Juno-0.4-rc0 v0.4-Juno-0.4 v0.4 for-v0.4/05.22 for-v0.4/05.21 for-v0.4/05.20 for-v0.4-rc0
1 parent d1466a2 commit 5132060c48fe2dbc3ce64755cd83b61d6e017f10 Vikram Kanigiri authored on 20 Mar 2014 Dan Handley committed on 21 Mar 2014

Browse code

Fix the disable_mmu code

Remove the hard coding of all the MMU related registers with 0 and disable MMU
by clearing the M and C bit in SCTLR_ELx

Change-Id: I4a0b1bb14a604734b74c32eb31315d8504a7b8d8

WIP_v2.3-LS master v2.2-LS v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3 v2.2-rc2 v2.2-rc1 v2.2-rc0 v2.2 v2.1-rc1 v2.1-rc0 v2.1 v2.0-rc0 v2.0 v1.6-rc1 v1.6-rc0 v1.6 v1.5-rc3 v1.5-rc2 v1.5-rc1 v1.5-rc0 v1.5 v1.4-rc0 v1.4 v1.3_rc2 v1.3_rc1 v1.3-rc0 v1.3 v1.2-rc0 v1.2 v1.1-rc3 v1.1-rc2 v1.1-rc1 v1.1-rc0 v1.1-Juno-0.1 v1.1 v1.0-rc0 v1.0 v0.4-rc2 v0.4-rc1 v0.4-Juno-0.6-rc1 v0.4-Juno-0.6-rc0 v0.4-Juno-0.5-rc1 v0.4-Juno-0.5-rc0 v0.4-Juno-0.5 v0.4-Juno-0.4-rc0 v0.4-Juno-0.4 v0.4 for-v0.4/05.22 for-v0.4/05.21 for-v0.4/05.20 for-v0.4-rc0

1 parent d1466a2 commit 5132060c48fe2dbc3ce64755cd83b61d6e017f10

Vikram Kanigiri authored on 20 Mar 2014

Dan Handley committed on 21 Mar 2014

Patch

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