Merge "zynqmp: pm: Add CLK_SET_RATE_PARENT in gem clock node" into integration

Merge changes from topic "add-versal-soc-support" into integration ...

* changes:
  zynqmp: pm: clock: Move custom flags to typeflags
  zynqmp: pm: clock: Add support for custom type flags
  plat: xilinx: zynqmp: Add GET_CALLBACK_DATA function
  zynqmp: pm: Remove CLK_TOPSW_LSBUS from invalid clock list

docs: Add upcoming Change Log to Table of Contents ...

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I2a7f38eaae3a78fc3caa37833af755c15e8236ce

Tegra194: platform handler for entering CPU standby state ...

This patch implements a handler to enter the standby state on
Tegra194 platforms. On receiving a CPU_STANDBY state request,
the platform handler issues TEGRA_NVG_CORE_C6 request to the
MCE firmware to take the CPU into the standby state.

Change-Id: I703a96ec12205853ddb3c3871b23e338e1f60687
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra194: memctrl: force viw and vifalr/w transactions as non-coherent ...

Force memory transactions from viw and viflar/w as non-coherent from
no-override. This is necessary as iso clients shouldn't use coherent
path and stage-2 smmu mappings won't mark transactions as non-coherent.
For native case, no-override works. But, not for virtualization case.

Change-Id: I1a8fc17787c8d0f8579bdaeeb719084993e27276
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>

Tegra194: memctrl: fix bug in client order id reg value generation ...

Client order id reset values are incorrectly and'ed with
mc_client_order_id macro, which resulted in getting reg value as
always zero. Updated mc_client_order_id macro to avoid and'ing outside
the macro, to take the reg value and update specific bit field
as necessary.

Change-Id: I880be6e4291d7cd58cf70d7c247a4044e57edd9e
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>

Tegra194: memctrl: enable mc coalescer ...

This patch enable the Memory Controller's "Coalescer" feature to
improve performance of memory transactions.

Change-Id: I50ba0354116284f85d9e170c293ce77e9f3fb4d8
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

Tegra194: update scratch registers used to read boot parameters ...

This patch changes SCRATCH_BOOT_PARAMS_ADDR macro to use SECURE_SCRATCH_RSV81
instead of SECURE_SCRATCH_RSV44. The previous level bootloader changed this
setting, so update here to keep both components in sync.

Change-Id: I4e0c1b54fc69482d5513a8608d0bf616677e1bdd
Signed-off-by: steven kao <skao@nvidia.com>

Tegra194: implement system shutdown/reset handlers ...

This patch implements the PSCI system shutdown and reset handlers,
that in turn issue the MCE commands.

Change-Id: Ia9c831674d7be615a6e336abca42f397e4455572
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>

Tegra194: mce: support for shutdown and reboot ...

This patch adds support for shutdown/reboot handlers to the MCE
driver.

ATF communicates with mce using nvg interface for shutdown &
reboot. Both shutdown and reboot use the same nvg index.
However, the 1st bit of the nvg data argument differentiates
whether its a shutdown or reboot.

Change-Id: Id2d1b0c4fec55abf69b7f8adb65ca70bfa920e73
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>

Tegra194: request CG7 before checking if SC7 is allowed ...

Currently firmware seems to be checking if we can get into system
suspend after checking if CC6 & C7 is allowed. For system suspend
to be triggered, the firmware needs to request for CG7 as well.

This patch fixes this anomaly.

Change-Id: I39c4c50092a4288f4f3fa4b0b1d5026be50f058f
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra194: config to enable/disable strict checking mode ...

This patch adds a new configuration option to the platform makefiles
that disables/enables strict checking mode. The config is enabled
by default.

Change-Id: I727dd0facee88d9517bf6956eaf9163eba25c8bb
Signed-off-by: Steven Kao <skao@nvidia.com>

Tegra194: remove unused platform configs ...

This patch cleans the makefile to remove unused platform config
options.

Change-Id: I96d9795c0f0ba593de96017dc9a401d7c2ab471a
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra194: restore XUSB stream IDs on System Resume ...

The stream IDs for XUSB programmed during cold boot are lost on System
Suspend. This patch restores the XUSB stream IDs on System Resume.

NOTE: THE WARMBOOT CODE NEEDS TO MAKE SURE THAT THE XUSB MODULE IS OUT
OF RESET AND THE CLOCKS ARE ENABLED, BEFORE POWERING ON THE CPU, DURING
SYSTEM RESUME.

Change-Id: Ibd5f1e5ebacffa6b29b625f4c41ecf204afa8191
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Merge "rcar_gen3: Add missing #{address,size}-cells into generated DT" into integration

Merge "docs: Creating a Change Log Template File" into integration

plat: xilinx: zynqmp: Add checksum support for IPI data ...

This patch adds support for CRC checksum for IPI data when the
macro ZYNQMP_IPI_CRC_CHECK is defined.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Ic981f162666b3c1fffeb1b9fef3ee7714ecd889d

Merge "plat: intel: Fix UEFI decompression issue" into integration

Merge "intel: Change all global sip function to static" into integration

plat: intel: Fix UEFI decompression issue ...

UEFI decompression will fail if the payload size is too large and the load
address is too low. This patch moves the payload to a higher address to fix
the issue

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
Change-Id: I36087fbd2237b62891c59dbe2d34336bddfaa396

intel: Change all global sip function to static ...

All function in socfpga_sip_svc.c should only be called locally except
sip_smc_handler().

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ib84ef9a2e521967baa4cfd32e6bc569dd3a5d2f5

Merge "a8k: Implement platform specific power off" into integration

Merge "allwinner: Reenable USE_COHERENT_MEM" into integration

allwinner: Reenable USE_COHERENT_MEM ...

Now that there is plenty of space (32 KiB) available for NOBITS
sections, we can afford using an entire page for coherent memory. In
fact, because it simplifies the code, this is a beneficial change for
loaded image (.text) size, where we are still close to the size limit.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: I0b899dabcb162015c63b0e4aed0869569c889ed9

a8k: Implement platform specific power off ...

Implements a way to add platform specific power off code to a
Marvell Armada 8K platform.

Marvell Armada 8K boards can now add a board/system_power.c file
that contains a system_power_off() function.
This function can now send a command to a power management MCU or
other board periferals before shutting the board down.

Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Change-Id: Iaba20bc2f603195679c54ad12c0c18962dd8e3db
---
I am working on a device that will be ported later, which has a
custom power management MCU that handles LEDs, board power and fans
and requires this separation.

rcar_gen3: Add missing #{address,size}-cells into generated DT ...

Add missing #address-cells and #size-cells into generated DT, otherwise
the DT is invalid. While the parsers thus far handled this correctly via
various fallbacks, this is not applicable in the long run, so fix this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ic808a3b27b93e5258ec1a19acc3d593e53625c15

zynqmp: pm_service: Add support to query max divisor ...

Add new QID to get maximum supported divisor by clock.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I35fc92457e522f3f0614d983c21e55c2b0b8e80a

zynqmp: pm: Add CLK_SET_RATE_PARENT in gem clock node ...

Existing implementation does not allow to change the value of the
DIV1 because DIV2 does not have SET_RATE_PARENT flag.
This causes DIV1 value to be fixed and only value of DIV2 will be
adjusted according to required clock rate.

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Ic6c4ca091bf0c5dc91ebddf86621c82c705dc87b

zynqmp: pm: clock: Move custom flags to typeflags ...

Linux expects custom flags in type flags. So move
custom flags to type flags instead of providing
them to clock core flags.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I668a8084d966815a9d9e86c2b18ecb5b18cb6b78

zynqmp: pm: clock: Add support for custom type flags ...

Add support to add extra custom type flags and provide
to caller in topology query.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Id9cc065dbadfed2291dd4f62674d7838da4cdf40