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History for arm-trusted-firmware / plat / intel / soc / agilex

2019-09-12	b90f207 Browse files » Invalidate dcache build option for bl2 entry at EL3 ... Some of the platform (ie. Agilex) make use of CCU IPs which will only be initialized during bl2_el3_early_platform_setup. Any operation to the cache beforehand will crash the platform. Hence, this will provide an option to skip the data cache invalidation upon bl2 entry at EL3 Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I2c924ed0589a72d0034714c31be8fe57237d1f06 Hadi Asyrafi authored on 20 Aug 2019 Soby Mathew committed on 12 Sep 2019
2019-09-12	afac968 Browse files » intel: agilex: Fix psci power domain off ... Disable gic cpu interface for powered down cpu. This patch also removes core reset during power off as core reset will be done during power on Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I2ca96d876b6e71e56d24a9a7e184b6d6226b8673 Hadi Asyrafi committed on 12 Sep 2019
2019-08-28	3441952 Browse files » Merge "intel: agilex: Clear PLL lostlock bypass mode" into integration Paul Beesley authored on 28 Aug 2019 TrustedFirmware Code Review committed on 28 Aug 2019
2019-08-19	24d16a2 Browse files » intel: agilex: HMC driver calculate DDR size ... Driver will calculate DDR size instead of using hardcoded value Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I642cf2180929965ef12bd5ae4393b2f3d0dcddde Hadi Asyrafi committed on 19 Aug 2019
2019-08-18	960a12b Browse files » intel: agilex: Clear PLL lostlock bypass mode ... To provide glitchless clock to downstream logic even if clock toggles Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I728d64d0ba3b4492125bea5b0737fc83180356f1 Hadi Asyrafi committed on 18 Aug 2019
2019-08-15	d1b6013 Browse files » Merge "intel: agilex: Fix memory controller driver" into integration Paul Beesley authored on 15 Aug 2019 TrustedFirmware Code Review committed on 15 Aug 2019
2019-08-14	b266d82 Browse files » intel: agilex: Fix memory controller driver ... Increase calibration delay, fix ddrio control config & nonsecure region limit Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: Ibca3c247a3ad5104176ca9057d29755599f13c9b Hadi Asyrafi committed on 14 Aug 2019
2019-08-14	4e865bd Browse files » intel: agilex: Fix reliance on hard coded clock information ... Extract clock information for UART, MMC & Watchdog from the clock manager Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I42d3d4ceeaf45788d457472f6ddcd3fe099f0133 Hadi Asyrafi committed on 14 Aug 2019
2019-08-07	5119fa7 Browse files » Merge changes from topic "intel-plat-refactor" into integration ... * changes: intel: Platform common code refactor intel: Platform common code refactor Sandrine Bailleux authored on 7 Aug 2019 TrustedFirmware Code Review committed on 7 Aug 2019
2019-08-07	3f7b149 Browse files » intel: Platform common code refactor ... Pull out common code from aarch64 and include Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I4d0f5e1bb01bcdacbedf8e6c359de594239b645f Hadi Asyrafi authored on 1 Aug 2019 Sandrine Bailleux committed on 7 Aug 2019
2019-08-01	d882078 Browse files » intel: Platform common code refactor ... Pull out common code from agilex and stratix10 Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: Iddc0a9e6eccb30823d7b15615d5ce9c6bedb2abc Hadi Asyrafi committed on 1 Aug 2019
2019-07-29	94eef29 Browse files » intel: agilex: Fix BL31 memory mapping ... Previous config blocks ATF runtime service communications with SDM mailbox Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: Ic97aa381d3ceb96395595ec192132859d626b8d1 Hadi Asyrafi committed on 29 Jul 2019
2019-07-24	3bd24e7 Browse files » intel: agilex: Fix build error ... "result of '1 << 31' requires 33 bits to represent, but 'int' only has 32 bits [-Werror=shift-overflow=]" This is treated as an error since commit 93c690eba8ca ("Enable -Wshift-overflow=2 to check for undefined shift behavior") Change-Id: I141827a6711ab7759bfd6357e4ed9c1176da7c7b Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> Ambroise Vincent committed on 24 Jul 2019
2019-07-17	2f11d54 Browse files » intel: Adds support for Agilex platform ... Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: Ib2ad2068abdf0b204c5cb021ea919581adaca4ef Hadi Asyrafi committed on 17 Jul 2019