socfpga: Stop putting 512 byte header on SocFPGA images ...

Since images without the extra header now boot correctly, stop adding
it.  This makes the image 512 bytes smaller.

It also gives the image a correct barebox header.  The 512 byte extra
header looked like a barebox header (had a "barebox\n" signature) but
had incorrect size and text start fields.

Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

socfpga: correct start vector when not using extra barebox header ...

The barebox ARM image has a 0x50 byte header that consists of:
Bytes 0x00 - 0x0a:  Instruction(s) to jump to start of code
Bytes 0x20 - 0x2f:  Signature and some other data
The rest of header is basically padding.

On SocFPGA, the ROM bootloader expects the 2nd stage bootloader
(barebox) to have a 0x40 byte header with the following fields:
Bytes 0x40 - 0x4b:  Signature and some other data
Bytes 0x4c - 0x4f:  Instruction to jump to start of code

These two headers are compatible, as everything defined in the SocFPGA
header is at a location that is padding the barebox header.

socfpga_mkimage has two methods for creating a SocFPGA image.  One method
prepends an extra 512 byte header to the barebox image, which contains the
SoCFPGA header described above.  The start vector at 0x4c is hard coded to
jump to offset 512, where the barebox header's start vector will be.

socfpga_mkimage can also not prepend this additional header and instead
modify the barebox header to be SoCFPGA compatible.  But it only writes
bytes 0x40-0x4b and not the start vector at 0x4c, leaving that word as
padding.  And so this image will not boot when the ROM bootloader runs it.

This changes the SoCFPGA header creator to write a correct start vector for
both methods.  It will create a branch instruction at 0x4c that jumps to the
start of the barebox image, whether it be at offset 0 or offset 512 (or any
other location).

This makes SoCFPGA images without the extra header bootable.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

imd: make it work on big-endian machines ...

The commit

    commit 5e33577
    Author: Sascha Hauer <s.hauer@pengutronix.de>
    Date:   Tue Mar 29 10:06:46 2016 +0200

        imd: use struct imd_header * as argument

introduces additional imd type checks like this

    if (!imd_is_string(imd->type))
           return NULL;

These checks work incorrectly on any big-endian machine
because the imd->type field needs addition conversion
to little-endian byteorder before use.

Here is the imd command output on big-endian qemu-malta:

    barebox:/ imd /dev/nor0.barebox
    release: <NULL>
    build: <NULL>

This patch fixes the problem by adding necessary conversion
via imd_read_type().

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ATA: platform_ide: Fix resource allocation ...

Fixes: 3bd69ad driver: replace dev_request_mem_region with
dev_request_mem_resource

The driver trying to use memory resource, then IO resource.
The ALT register is optional.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

imx-bbu-nand-fcb: add missing newline character ...

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

reset_source: export reset_source_set_priority ...

In commit 4a7534bf07e ("reset-source: Allow different priorities") the
function name changed from reset_source_set to reset_source_set_priority.
Do that change in EXPORT_SYMBOL() accordingly.
reset_source_set still exists but is a static inline now.

Fixes: 4a7534bf07e ("reset-source: Allow different priorities")
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

usb: fastboot: Fix oem exec support ...

Fixes: b1374a6 usb: fastboot: drop CONFIG_COMMAND_SUPPORT dependency

The correct config option to depend on is CONFIG_COMMAND_SUPPORT,
not CONFIG_COMMAND.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/ubiformat'

Merge branch 'for-next/pci'

Merge branch 'for-next/mtd'

Merge branch 'for-next/misc'

Merge branch 'for-next/include-pdata'

Merge branch 'for-next/include-cleanup'

Merge branch 'for-next/imx6-phytec'

Merge branch 'for-next/imx'

Merge branch 'for-next/bootm'

Merge branch 'for-next/arm'

Release v2016.05.0 ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: imx-esdhc: implement reset quirks for i.MX6 DualLite/Solo ...

First of all the reset values of MMC interfaces are differently between
Quad and DualLite/Solo SoM.

                Register VEND_SPEC2(0xC8)
    Quad:       0x0
    DualLite:   0x00000006
    default:    0x00000006    (from i.MX6 Reference Manual)

Furthermore the ROM Code of Quad and DualLite uses the MMC interfaces
differently when it loads the bootloader from that device:

                Register DLL_CTRL(0x60)  Bit 25 FBCLK_SEL (0x48)
    Quad:       0x0                      0
    DualLite:   0x01000021               1

Since the linux kernel and barebox driver doesn't reset all registers,
the MMC interface is in an inconsistent state, which leads to boot
failures for some eMMC devices on the i.MX6 DualLite SoM. The errors
look like:

    mmcblk3: error -110 sending stop command, original cmd response 0x900, card status 0x400900
    mmcblk3: error -84 transferring data, sector 24578, nr 2, cmd response 0x900, card status 0x0
    mmcblk3: retrying using single block read
    mmcblk3: error -84 transferring data, sector 24578, nr 2, cmd response 0x900, card status 0x0
    blk_update_request: I/O error, dev mmcblk3, sector 24578

It's sufficient to reset register DLL_CTRL and bit FBCLK_SEL. Register
VEND_SPEC2 has no effect.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

net: phy: Add fixed link support ...

Some network devices, especially when connected to a switch, are
connected via a fixed link. This patch adds support for a fixed phy
configured through device tree.
TODO: Add support for the "speed" and "full-duplex" properties.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Wjatscheslaw Stoljarski <wjatscheslaw.stoljarski@kiwigrid.com>

ARM: phytec-som-imx6: add automount for first partition on eMMC ...

For the phyCORE-i.MX6 add an automount command for the first partition
on the eMMC device.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

blspec: push appendroot handling to bootm ...

The bootm code now can handle the adding of the root= option itself,
so drop the code and let bootm do it.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

bootm: Optionally add a root= option to Kernel command line ...

It becomes a common case that the Kernel is loaded from the filesystem
which later becomes the rootfs. This adds a possibility to let bootm
automatically append the root= option to the kernel command line. This
is done when global.bootm.appendroot is true.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

parameter: Use strtobool ...

Use strtobool to convert the input string to a boolean type.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: imx6: Add DT bindings to configure PHY Tx driver settings ...

The settings in GPR8 are dependent upon the particular layout of the
hardware platform.  As such, they should be configurable via the device
tree.

Look up PHY Tx driver settings from the device tree.  Fall back to the
original hard-coded values if they are not specified in the device tree.

[Andrey Smirnov: port to Barebox codebase]

Signed-off-by: Justin Waters <justin.waters@timesys.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: imx6: Remove broken Gen2 workaround ...

Remove the remnants of the workaround for erratum ERR005184 which was never
completely implemented.  The checks alone don't carry any value as we don't
act properly on the result.

A workaround should be added to the lane speed change in establish_link
later.

[Andrey Smirnov: port to Barebox codebase]

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: imx6: Move PHY reset into imx6_pcie_establish_link() ...

This adds the PHY reset into a common error path of
imx6_pcie_establish_link(), deduplicating some of the debug prints.  Also
reduce the severity of the "no-link" message in the one place where it is
expected to be hit when no peripheral is attached.

[Andrey Smirnov: port to Barebox codebase]

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: phytec-som-imx6: add NOR for phycore-imx6 emmc ...

Enable NOR for phyCORE-i.MX6 DualLite and Quad eMMC variants.

Furthermore add an extra 'status = "disabled"' in the flash node.  It
has no functional effect, because the SPI bus node 'ecspi1' is disabled,
too.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: phytec-som-imx6: adapt main update handler for eMMC ...

Some phyCORE-i.MX6 variants have eMMC instead of a NAND chip. Provide an
update_handler for them.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: phytec-som-imx6: rename environment folder ...

The extra environment folder for the phyCORE-i.MX6 had the suffix
'-mira'. That's the name of a baseboard. Since the bootloader is generic
for all baseboards, use a generic suffix for the environment folder.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>