ARM v7: fix mmu-off operation ...

Although conclusions in 50d1b2d "ARM
v7: Fix register corruption in v7_mmu_cache_off" are correct, the
implemented fix is not complete because the following failure can
happen:

1. d-cache contains the cache line around 'sp'

2. v7_mmu_cache_off() disables cache

3. early v7_mmu_cache_flush() pushes 'lr' on uncached stack

4. v7_mmu_cache_flush() flushes d-cache and can override stack written
   by step 3.

5. v7_mmu_cache_flush() pops 'lr' out of cache and jumps to it which
   might be random data now.

Patch avoids step 3 which is easy because 'lr' is never modified by the
function.  By using the 'r12' scratch register instead of 'r10', the
whole initial 'push' can be avoided.

Patch moves also the 'DMB' operation so that it is executed after data
has been pushed on stack.

Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

nand_base: sync flash detection functions with linux 3.9's code ...

this fix the problems introduced when detecting non ONFI flashes in
commit 4c2bdc8
"nand_base: detect more ONFI flash"

Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'pu/dhcp'

ARM: ccmx51: Another fix SDRAM size detection ...

For CCMX51-boards now we do not use ESDCTL, but actual command for
adding memory is missing. This patch fix this issue.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

net: dhcp: Fix tftp servername handling ...

When the dhcp code discovered the tftp-server-name option it immediately
tries to resolve the name. This can't succeed since the we are somewhere
in the dhcp processing and the nameserver may not even be known.

Fix this by resolving the name when dhcp is completed. While at it, do
this in a way that net_set_serverip is only called when resolv() returns
something useful. Otherwise we may end up overwriting a previously
configured serverip which came from the bootp bp_siaddr field.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

net: dhcp: Fix return value on ctrl-c ...

the dhcp command will return with 0 when ctrl-c is pressed. Fix this to
-EINTR instead.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

gpio: fix typos ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: remove unused clkdev.h ...

See also:

  commit eb84709
  Author: Sascha Hauer <s.hauer@pengutronix.de>
  Date:   Mon Mar 25 15:18:38 2013 +0100

      clk: remove unused __clk_[get|put]

      This is some unused code resulting from copying stuff from
      the kernel. Remove it.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MXS: fix SoC detecting ...

The missing 'break' statement lets look an i.MX23 like an i.MX28.

Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MCI/MXS: fix signed/unsigned mismatch ...

Using the MXS MCI driver with an eight bit capable eMMC results into the
'devinfo' message the interface uses '0' bits for data transfer:

 barebox:/ devinfo mxs_mci0
 resources:
 num   : 0
 start : 0x80034000
 size  : 0x00002000
 driver: mxs_mci
 bus: platform

  Interface
   Min. bus clock: 1476 Hz
   Max. bus clock: 48000000 Hz
   Current bus clock: 24000000 Hz
   Bus width: 0 bit

The eight bit interface width is stored internally as value '2'. And a two bit
'2' ends up into 0xfffffffe when used as an array index. Using an unsigned
field instead fixes this issue:

 barebox:/ devinfo mxs_mci0
 resources:
 num   : 0
 start : 0x80034000
 size  : 0x00002000
 driver: mxs_mci
 bus: platform

  Interface
   Min. bus clock: 1476 Hz
   Max. bus clock: 48000000 Hz
   Current bus clock: 24000000 Hz
   Bus width: 8 bit

Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: ccxmx51: detect SDRAM size by board id ...

This partly reverts:

commit 697e02b
Author: Alexander Shiyan <shc_work@mail.ru>
Date:   Tue Jan 22 15:08:31 2013 +0400

    ARM: ccmx51: Remove SDRAM size settings

    This patch removes SDRAM memory size setting from board due
    to auto detect last one by ESDCTL.

    Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
    Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The board originally configured the SDRAM controller for the
maximum size and detected the usable SDRAM size by reading the
board id. This became broken after switching to automatic SDRAM
size detection by reading back ESDCTL values.

This patch brings back the old behaviour.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: Allow disabling SDRAM autodetection ...

Some boards setup more memory than they actually have. The real memory
size can then be detected later for example by reading a board id.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

sama5d3xek: correct rootfs nand partition ...

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

qt1070: drop non used buf ...

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

commands/mem.c: drop non used DEVMEM ...

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM i.MX31 pcm037: fix erroneous IOMUX GPR setup in pcm037_usb_init() ...

In commit ad09b59 "ARM i.MX31: give
register base addresses a proper MX31_ prefix", the IOMUX GPR setup
to enable USBH2 was replaced with an incorrect source register.
Instead of reading the GPR register, USBOTG HWHOST is used as rmw source,
which contains 0x10020001.
Beside the intended GPR[11] setup ("Enable USBH2 signals on AudioPort 3 and
AudioPort6"), this erroneously also sets
	GPR[28] enable USBOTG loopback
	GPR[17] override DSR_DCE1 with USBOTG_DATA4
	GPR[0]  select FIR DMA requests instead of UART2 DMA

Beside breaking UART2, it probably also broke some UART1 and USB OTG setups.
Fix this and replace the address with the appropriate defines.

Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM i.MX31: cleanup MX31_ prefix: fix leftover IOMUXC_BASE defines ...

The prefix/cleanup series
	ad09b59
	a8c6359
	4c53af0
missed a few unprefixed IOMUXC_BASE define users. Fix these.

Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/tegra'

Merge branch 'for-next/remove-config-h'

Merge branch 'for-next/param' ...

Conflicts:
	drivers/mci/mci-core.c

Merge branch 'for-next/omap'

Merge branch 'for-next/of' ...

Conflicts:
	arch/arm/mach-imx/Makefile

Merge branch 'for-next/mxs'

Merge branch 'for-next/mtd'

Merge branch 'for-next/misc'

Merge branch 'for-next/memory-commands'

Merge branch 'for-next/mci'

Merge branch 'for-next/imx'

Merge branch 'for-next/gpio'

Merge branch 'for-next/atmel'