Merge branch 'for-next/dts'

Merge branch 'for-next/clk'

Merge branch 'for-next/arm-mmu'

Merge branch 'for-next/arm'

Release v2018.06.0 ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

dts: update to v4.17 ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: cache: Remove unused cache ops struct ...

Remove what appears to be a leftover from moving ARMv8 cache function
into a separate file that happened in 4b57aae26 ("ARM: Create own
cache.c file for aarch64")

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: interrupts64: Include ESR value in exception traceback ...

Oftentimes knowing the class of exception is not enough and full ESR
value is needed to decode the specifics. Add code to print ESR as a
part of excpetion traceback to provide that information.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Make use of dsb() and isb() helpers ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: no-mmu: Disable building for ARMv8 ...

Disable building for ARMv8 since no-mmu.c only supports ARMv7

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu64: Convert flags in arch_remap_range() ...

Flags passed to arch_remap_range() are architecture independent, so it
can't be passed as is to map_region(). Add code to do the proper
conversion to avoid subtle bugs that this confusion brings.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu64: Make use of create_table() ...

Make use of create_table() instead of calling xmemalign() and memset()
explicitly.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu64: Trivial code simplification ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

wdt: da9053: fix missed dev->hwdev conversion ...

Fixes: 1ef7cd07a304 (watchdog: rename dev to hwdev)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx6sx: use correct clocks for GPT ...

This is a stop gap solution until the upstream DT is fixed. In Linux this isn't
an issue as the driver prefers the "osc_per" clock, falling back to "per" and
then doing different things based on the SoC type and if the input clock rate
matches 3MHz. As this isn't really how the hardware works, but a fragile mix of
the clock driver exposing a clock with a faked frequency and system knowledge in
the GPT driver I prefer not to replicate this horrors in the Barebox driver,
but instead just use the system clock source.

Fixes: 2ebda864f837
       (ARM: imx: clocksource: Use per clock for determining parent freq)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mtd: core: Fix printing partitions in hex ...

When printing the partition size with "0x" prefix the value has to
be displayed in hex.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

dts: update to v4.17-rc7 ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: only create flat mapping when early MMU hasn't done it already ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

dts: update to v4.17-rc6 ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

dts: update to v4.17-rc5 ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Introduce ARM_TTB_SIZE ...

Commit 1c33aac ("ARM: use memalign to
allocate page table"), reasonalby changed TTB allocation size from
SZ_32K to SZ_16K (TTB's real size), but it also changed alignment from
SZ_16K to SZ_64K for unclear reasons.

Reading various TTBR related ARM documentation it seems that worst
case alignment for it is 16KiB (bits [0, 13 - N] must be zero) which
also matches early TTB allocation code.

Since both early and regular MMU code has to share this paramter,
introduce ARM_TTB_SIZE and use it in both cases for both size and
alignment.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Implement on-demand PTE allocation ...

Allocating PTEs for every 4K page corresponding to SDRAM upfront costs
us quite a bit of memory: 1KB per 1MB or RAM. This is far from being a
deal-breaker for majority of use-cases, but for builds where amount of
free memory is in hundres of KBs* it becomes a real hurdle for being
able to use MMU (which also means no L1 cache).

Given how we really only need PTEs for a very few regions of memory
dedicated from DMA buffers (Ethernet, USB, etc), changing MMU code to
do on-demand section splitting can allow us to save significant amount
of memory without any functionality loss.

Below is a very trivial comparison of memory usages on start before
and after this patch is applied.

Before:

barebox@ZII VF610 Development Board, Rev B:/ meminfo
used: 1271584
free: 265553032

After:

barebox@ZII VF610 Development Board, Rev B:/ meminfo
used: 795276
free: 266024448

Tested on:

       - VF610 Tower Board,
       - VF610 ZII Development Board (Rev. C)
       - i.MX51 Babbage Board
       - i.MX7 SabreSD Board
       - i.MX6 ZII RDU2 Board
        - AT91SAM9X5-EK Board

* One example of such use-case is memory testing while running purely
  out of SRAM

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Simplify the use of dma_flush_range() ...

Simplify the use of dma_flush_range() by changing its signature to
accept pointer to start of the data and data size. This change allows
us to avoid a whole bunch of repetitive arithmetic currently done by
all of the callers.

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Use dma_inv_range() in dma_sync_single_for_cpu() ...

The code in the if () statement is identical to already existing
dma_inv_rand(). Use it instead.

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Use find_pte() to find PTE in create_vector_table() ...

There's already a function that implement necessary arithemtic to find
offset within page table for a given address, so make use of it
instead of re-implementing it again.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Make sure that address is 1M aligned in arm_create_pte() ...

If address passed arm_create_pte() is not 1M (PGDIR_SIZE) aligned,
page table that is created will end up having unexpected mapping
offset, breaking "1:1 mapping" assumption and leading to bugs that are
not immediately obvious in their nature.

To prevent this and because all of the callers already do said
alignement in-place, move the alignment code to be a part of
arm_create_pte().

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Pass PTE flags a parameter to arm_create_pte() ...

In order to make it possible to use this functions in contexts where
creating a new PTE of uncached pages in not appropriate, pass PTE
flags a parameter to arm_create_pte() and fix all of the current users
as necessary.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Share code between dma_alloc_*() functions ...

Code of dma_alloc_coherent() and dma_alloc_writecombine() is almost
identical with exception of the flags passed to undelying call to
__remap_range(). Move commong code into a shared subroutine and
convert both functions to use it.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Use xmemalign in mmu_init() ...

We don't handle OOM case in that code, so using xmemalign seems like a
better option.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Use xmemalign in arm_create_pte() ...

We don't handle the OOM case in that code, so using xmemalign seems
like a better option.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>