arm: imx: add initial imx8mp support ...

This adds base support for the i.MX8MP SoC. Not much to do here as this
SoC is quite similar to the i.MX8M. This adds:

- Kconfig symbols
- bootsource detection
- register base address defines
- iomux defines

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

mci: imx-esdhc: Add i.MX8mp compatible ...

Only add the compatible string to let the driver match.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

net: fec_imx: add fsl,imx8mp-fec compatible ...

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

pinctrl: imx-iomux-v3: Add i.MX8MP compatible ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

serial: i.MX: Add i.MX8MP compatible ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scripts: imx-image: rename dcdofs to ivtofs ...

This renames the dcdofs config option in the imx-image tool to ivtofs.  dcdofs
is a misnomer. The DCD (Device Configuration Data) is only one part of the data
linked into the IVT (Image Vector Table), but the meaning of the option is
really the latter, not the former.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scripts: imx-image: rename image_dcd_offset to image_ivt_offset ...

image_dcd_offset is a misnomer, it should really be image_ivt_offset.
The DCD (Device Configuration Data) is only one part of the data linked
into the IVT (Image Vector Table), but the meaning of the variable is
really the latter, not the former.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scripts: imx-image: Fix writing image with IVT offset = 0 ...

When we have written the barebox header the next thing we do is to lseek
forward by the size of the header gap. This means our position is
already inside of the rest of the image and we have to skip this offset
from the rest of the image. This only works when the rest of the image
doesn't have anything needed in the first few bytes. Some newer SoCs
have the IVT at offset 0 though, so with the current approach we skip
writing the IVT.
Instead of doing this we should lseek to the end of the header gap.
With this we are at the right position to just write the full image
containing the IVT.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scripts: imx-image: exit with error when barebox header conflicts with IVT ...

When the IVT is right at the beginning of the image it conflicts with
the barebox header. Bail out with an error when this happens.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scripts: imx-image: Add extra code path for i.MX35 ...

The i.MX35 writes two copies of the header at the beginning of the
image. This is written in a loop right now. Make the i.MX35 an extra
code path so that it is out of the way for the changes in the next
patches.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scripts: imx-image: exit on read/write failures ...

When xread/xwrite fails the caller bails out of the program with an
error. We can drop all the error handling by letting xread/xwrite
call exit() themselves.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scripts: imx-image: Only set DCD pointer when we have DCD data ...

When we do not have any DCD data we can set the pointer to the
data to NULL.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

net:fec: fixed unaligned access and stack corruption ...

on 64 bit architectures, the 'enum fec_type' might not be aligned and
large enough to hold a pointer.  When running barebox without MMU,
this will crash like

| i.MX8MM unique ID: dab4b7491a2c4209
| DABT (current EL) exception (ESR 0x96000061) at 0x00000000fffefeb4
| elr: 00000000ffe14c28 lr : 00000000ffe196e0
| x0 : 0000000000000002 x1 : 00000000fffefeb4
| x2 : 00000000ffe91370 x3 : 00000000bfe1b6e8
| x4 : 0000000000000000 x5 : 0000000011000000
| ...
| Call trace:
| [<ffe14c28>] (dev_get_drvdata+0xc/0x30) from [<ffe1446c>] (device_probe+0x54/0xd0)
| [<ffe1446c>] (device_probe+0x54/0xd0) from [<ffe14530>] (match+0x48/0x58)
| [<ffe14530>] (match+0x48/0x58) from [<ffe14a64>] (register_driver+0xc0/0xd0)
| [<ffe14a64>] (register_driver+0xc0/0xd0) from [<ffe01738>] (start_barebox+0x64/0x90)

Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: configs: imx_v7_defconfig: Add bootchooser ...

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Robert Karszniewicz <r.karszniewicz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: configs: imx_v7_defconfig: Add state framework ...

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Robert Karszniewicz <r.karszniewicz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: configs: Remove unused Kconfig symbol 'NAND_IMX_BBM' ...

This Kconfig symbol has been removed in
2ad441bb7e78 ("mtd: nand-imx: Create BBT automatically when necessary")

Signed-off-by: Robert Karszniewicz <r.karszniewicz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: dts: vf610-zii-dev-rev-c: Expose fiber EEPROM modules ...

EEPROM on fiber optic modules present on Rev C ZII VF610 Dev board
can be exposed as AT24 compatible devices. Add corresponding DT nodes
needed for that.

Signed-off-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: Enable new boards in imx_v7_defconfig ...

We got a few new boards until we last updated imx_v7_defconfig. Enable
them.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: add imx6 based Protonic boads ...

Add initial support for 15 i.MX6 based Protonic boards.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: dts: imx6: add Protonic boards ...

This DTS will be replaced by kernel version

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Arm: i.MX5: Do not disable L2 cache ...

Disabling the L2 cache is not working in imx5_init_lowlevel() because
the necessary cache maintenance operations are missing. This often
results in cache corruption in a chainloaded barebox.
Disabling the cache is unnecessary: when we come from the ROM the L2
cache is disabled anyway, so disabling it is a no-op. When we get here
in a chainloaded barebox the L2 cache is already enabled and correctly
configured. So instead of initializing it again we can take an enabled
L2 cache as a sign to skip initialization and just return from the
function.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/spdx'

Merge branch 'for-next/sandbox-compile-test'

Merge branch 'for-next/ratp'

Merge branch 'for-next/mmc'

Merge branch 'for-next/misc'

Merge branch 'for-next/kvx'

Merge branch 'for-next/kbuild'

Merge branch 'for-next/imx'

Merge branch 'for-next/fastboot'