gitignore: add kwb binary images to gitignore file ...

This adds barebox.kwb and barebox.kwbuart to the list of files to
be ignored by git.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: add basic support for the Armada XP GP platform ...

The Armada XP GP platform is an evaluation platform designed by
Marvell, that uses the MV78460 quad-core SoC from the Armada XP
family.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: add basic support for the Armada 370 Mirabox platform ...

The Mirabox is a platform manufactured by Globalscale, and based on
the Marvell Armada 370 SoC.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: add basic support for Armada XP OpenBlocks AX3 platform ...

The OpenBlocks AX3 platform is manufactured by PlatHome and uses the
MV78260 dual-core SoC from the Armada XP family.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: integrate kwbimage in the image generation ...

When a ARCH_MVEBU platform is selected, generate barebox.kwb and
barebox.kwbuart images from barebox.bin, using kwbimage.

barebox.kwb is generated by executing kwbimage on the board
kwbimage.cfg file, and is therefore designed to be booted from the
default boot media of the board, as defined by kwbimage.cfg (typically
a NAND flash or SPI flash).

barebox.kwbuart is generated by executing kwbimage on the board
kwbimage.cfg file, but by overriding the boot media to be UART. This
image is suitable for usage with the kwbtool and is generally useful
for recovery purposes.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Squashed this fixup:

arm: ensure the build doesn't fail when kwbimage lacks the binary blob

mach-mvebu images for Armada 370 and Armada XP SoC require a DDR3
training code which should be extracted from existing bootable images
for the relevant board. When such binary blob has not been extracted,
the build of the .kwb and .kwbuart images will fail. This is annoying
as it makes the build of all Armada 370/XP defconfig fail, which can
be a problem for automated builds.

This proposal makes the failure of kwbimage not a fatal failure for
the build process, and shows a warning. The user therefore sees:

====================================================================
  KWB     barebox.kwb
Didn't find the file 'plathome-openblocks-ax3-binary.0' in '/home/thomas/projets/barebox' which is mandatory to generate the image
This file generally contains the DDR3 training code, and should be extracted from an existing bootable
image for your board. See 'kwbimage -x' to extract it from an existing image.
Could not create image
WARNING: Couldn't create KWB image due to previous errors.
  KWBUART barebox.kwbuart
Didn't find the file 'plathome-openblocks-ax3-binary.0' in '/home/thomas/projets/barebox' which is mandatory to generate the image
This file generally contains the DDR3 training code, and should be extracted from an existing bootable
image for your board. See 'kwbimage -x' to extract it from an existing image.
Could not create image
WARNING Couldn't create KWB image due to previous errors.
====================================================================

The only drawback is that barebox-flash-image, which normally points
to barebox.kwb, becomes a stale symbolic link.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: initial support for Marvell Armada 370/XP SoCs ...

This commit adds minimal support for the Armada 370 and Armada XP SoCs
from Marvell.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scripts: add kwboot tool ...

This tool is used with Marvell EBU SoC to trigger the UART boot mode
provided by the SoC BootROM, and push the bootloader image to the
target using the Xmodem protocol.

It has been taken from the U-Boot source code, with minor
modifications to make it work with Armada 370/XP platforms.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scripts: new kwbimage manipulation tool for Marvell SoC boot images ...

The Marvell EBU SoCs (Kirkwood, Armada 370, Armada XP) have a BootROM
that understand a specific image format, composed of a main header,
several extension headers and a paylod. This image can be booted from
NAND, SPI, SATA, UART, NOR, etc.

This patch adds a tool that allows to extract the components and
configuration of existing images, and to create new images.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MXS: fix SoC detecting ...

The missing 'break' statement lets look an i.MX23 like an i.MX28.

Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MCI/MXS: fix signed/unsigned mismatch ...

Using the MXS MCI driver with an eight bit capable eMMC results into the
'devinfo' message the interface uses '0' bits for data transfer:

 barebox:/ devinfo mxs_mci0
 resources:
 num   : 0
 start : 0x80034000
 size  : 0x00002000
 driver: mxs_mci
 bus: platform

  Interface
   Min. bus clock: 1476 Hz
   Max. bus clock: 48000000 Hz
   Current bus clock: 24000000 Hz
   Bus width: 0 bit

The eight bit interface width is stored internally as value '2'. And a two bit
'2' ends up into 0xfffffffe when used as an array index. Using an unsigned
field instead fixes this issue:

 barebox:/ devinfo mxs_mci0
 resources:
 num   : 0
 start : 0x80034000
 size  : 0x00002000
 driver: mxs_mci
 bus: platform

  Interface
   Min. bus clock: 1476 Hz
   Max. bus clock: 48000000 Hz
   Current bus clock: 24000000 Hz
   Bus width: 8 bit

Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: ccxmx51: detect SDRAM size by board id ...

This partly reverts:

commit 697e02b
Author: Alexander Shiyan <shc_work@mail.ru>
Date:   Tue Jan 22 15:08:31 2013 +0400

    ARM: ccmx51: Remove SDRAM size settings

    This patch removes SDRAM memory size setting from board due
    to auto detect last one by ESDCTL.

    Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
    Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The board originally configured the SDRAM controller for the
maximum size and detected the usable SDRAM size by reading the
board id. This became broken after switching to automatic SDRAM
size detection by reading back ESDCTL values.

This patch brings back the old behaviour.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: Allow disabling SDRAM autodetection ...

Some boards setup more memory than they actually have. The real memory
size can then be detected later for example by reading a board id.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

sama5d3xek: correct rootfs nand partition ...

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

qt1070: drop non used buf ...

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

commands/mem.c: drop non used DEVMEM ...

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM i.MX31 pcm037: fix erroneous IOMUX GPR setup in pcm037_usb_init() ...

In commit ad09b59 "ARM i.MX31: give
register base addresses a proper MX31_ prefix", the IOMUX GPR setup
to enable USBH2 was replaced with an incorrect source register.
Instead of reading the GPR register, USBOTG HWHOST is used as rmw source,
which contains 0x10020001.
Beside the intended GPR[11] setup ("Enable USBH2 signals on AudioPort 3 and
AudioPort6"), this erroneously also sets
	GPR[28] enable USBOTG loopback
	GPR[17] override DSR_DCE1 with USBOTG_DATA4
	GPR[0]  select FIR DMA requests instead of UART2 DMA

Beside breaking UART2, it probably also broke some UART1 and USB OTG setups.
Fix this and replace the address with the appropriate defines.

Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM i.MX31: cleanup MX31_ prefix: fix leftover IOMUXC_BASE defines ...

The prefix/cleanup series
	ad09b59
	a8c6359
	4c53af0
missed a few unprefixed IOMUXC_BASE define users. Fix these.

Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/tegra'

Merge branch 'for-next/remove-config-h'

Merge branch 'for-next/param' ...

Conflicts:
	drivers/mci/mci-core.c

Merge branch 'for-next/omap'

Merge branch 'for-next/of' ...

Conflicts:
	arch/arm/mach-imx/Makefile

Merge branch 'for-next/mxs'

Merge branch 'for-next/mtd'

Merge branch 'for-next/misc'

Merge branch 'for-next/memory-commands'

Merge branch 'for-next/mci'

Merge branch 'for-next/imx'

Merge branch 'for-next/gpio'

Merge branch 'for-next/atmel'