ARM: i.MX8MQ: Query and display ATF fimware hash if available ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: nxp-imx8mq-evk: Add code to load ATF BL31 blob ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: xload-esdhc: Allow placing image to align its entry point ...

Allow placing image to align its entry point with a particular entry
point address. This is needed for SoC's like i.MX8M where
vendor-provided ARM Trusted Firmware blob will exit at specific
pre-determined address and we need to be able to pick execution up
from there.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: xload-esdhc: Make use of <mach/imx-header.h> ...

Convert esdhc_start_image() to use constants and data types from
<mach/imx-header.h>. Also, while at it, define a simple inline
function to test if an arbitrary binary blob is i.MX flash header v2.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: Move i.MX header definitions to mach-imx ...

Move i.MX header definitions from scripts to mach-imx in order to make
it available to both script and bootloader code.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Mark SP as being clobbered in arm_setup_stack() ...

Not sure why it was working before, but with recent update of AArch64
GCC to 8.1.1 on my Fedora 28 machine, compiling barebox_arm_entry()
yields the following assembly:

0000000000002aac <barebox_arm_entry>:
    2aac:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
    2ab0:	d1404023 	sub	x3, x1, #0x10, lsl #12
    2ab4:	d1004063 	sub	x3, x3, #0x10
    2ab8:	910003fd 	mov	x29, sp
    2abc:	8b000063 	add	x3, x3, x0
    2ac0:	a90153f3 	stp	x19, x20, [sp, #16]
    2ac4:	aa0003f3 	mov	x19, x0
    2ac8:	aa0103f4 	mov	x20, x1
    2acc:	f90017e2 	str	x2, [sp, #40] <-- storing 'boarddata' on old stack
    2ad0:	9100007f 	mov	sp, x3 <-- setting up new stack
    2ad4:	97ffffdd 	bl	2a48 <arm_early_mmu_cache_invalidate>
    2ad8:	f94017e2 	ldr	x2, [sp, #40] <--- sadness
    2adc:	aa1403e1 	mov	x1, x20
    2ae0:	aa1303e0 	mov	x0, x19
    2ae4:	940000a1 	bl	2d68 <barebox_multi_pbl_start>

Which result in AArch64 image (i.MX8MQ) not being bootable. With SP
marked as clobbered, the above assembly changes to the following:

0000000000002aac <barebox_arm_entry>:
    2aac:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
    2ab0:	d1404023 	sub	x3, x1, #0x10, lsl #12
    2ab4:	d1004063 	sub	x3, x3, #0x10
    2ab8:	910003fd 	mov	x29, sp
    2abc:	a90153f3 	stp	x19, x20, [sp, #16]
    2ac0:	8b000063 	add	x3, x3, x0
    2ac4:	aa0003f3 	mov	x19, x0
    2ac8:	aa0103f4 	mov	x20, x1
    2acc:	f90017a2 	str	x2, [x29, #40]
    2ad0:	9100007f 	mov	sp, x3
    2ad4:	97ffffdd 	bl	2a48 <arm_early_mmu_cache_invalidate>
    2ad8:	f94017a2 	ldr	x2, [x29, #40]
    2adc:	aa1403e1 	mov	x1, x20
    2ae0:	aa1303e0 	mov	x0, x19
    2ae4:	940000a1 	bl	2d68 <barebox_multi_pbl_start>

now x29 is used to access stored x2 which avoids the problem and
allows the system to boot correctly.

The change is a no-op on AArch32.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: phytec-som-am335x: make autoenable actually usable ...

IS_ENABLED has to be passed the full symbol name including the CONFIG_
prefix. Otherwise IS_ENABLED evaluates to 0.

Fixes: 2877e08f9e1a ("ARM: phytec-som-am335x: Add autoenable")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
--
Cc: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

usb: gadget: allow to actually enable sparse fastboot support ...

When sparse support was (intended to be) made optional it was
effectively unconditionally disabled because

	IS_ENABLED(USB_GADGET_FASTBOOT_SPARSE)

always evaluates to 0. To actually make use of the introduced kconfig
symbol the CONFIG_ prefix must not be skipped.

Fixes: f4b5d3eeb607 ("usb: gadget: fastboot: Make sparse support optional")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Tested-by: Gavin Schenk <g.schenk@eckelmann.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: fix compilation with BBU disabled ...

Make a static inline wrapper actually static inline.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: fimware: Add pre-built BL31 ATF blob ...

Running Linux on i.MX8M requires us to use and properly set up a ARM
Trusted Firmware blob. For the sake of convenience, add a pre-built
blob to our firmware tree, so it can be used by individual boards.

This blob was built using Buildroot:

 - commit: 6b02b82
 - defconig: freescale_imx8mqevk_defconfig

The resulting file of interest is output/images/bl31.bin

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX8MQ: Add code to load BL31 ATF blob ...

Add imx8mq_atf_load_bl31() containing all of the code needed to load
and transfer control to BL31 ATF blob on i.MX8M.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX8MQ: Configure cntfrq only in EL3 ...

We only can (and should only need to) configure cntfrq when running in
EL3 and executing this code in any other exception level will result
in exception.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Add code to support SMCCC on AArch64 ...

Port SMCCC code from Linux kernel. To accomodate that:

  - Introduce CONFIG_ARM_SMCCC, to allow enabling the code
    independent of CONFIG_ARM_SECURE_MONITOR

  - Bring <linux/arm-smccc.h> in

  - Add necessary constants to arch/arm/asm-offsets.c

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: nxp-imx8mq-evk: Update DDR initialization code ...

Previous version of DDR initialization code was generated by a beta
version of MX8_DDR_tool. This updates the code to the output of
MX8_DDR_tool v1.0, which seem to fix the vendor Linux kernel hang*
that was happening with the previous version.

* The kernel would hang as soon as it tried to utilize DDR's DVFS
  features and switch DDR frequency (disabling busfreq-imx8mq.c would
  fix the problem).

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: fix compilation with BBU disabled ...

Make a static inline wrapper actually static inline.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: fix cache flushing when replacing a section with a PTE ...

When replacing a section with a PTE, we must make sure that the newly
initialized PTE entries are flushed from the cache before changing the
entry in the TTB. Otherwise a L1 TLB miss causes the hardware pagetable
walker to walk into a PTE with undefined content, causing exactly that
behaviour.

Move all the necessary cache flushing to arm_create_pte(), to avoid any
caller getting this wrong in the future.

Fixes: e3e54c644180 (ARM: mmu: Implement on-demand PTE allocation)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

block: Adjust cache sizes ...

Use four times more cache entries and divide the memory for each entry
by four. This lowers the linear read throughput somewhat but increases
the access speed for filesystems.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

fs: squashfs: Switch to dentry cache implementation ...

While at it implement symlink support.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

fs: cramfs: Switch to dentry cache implementation ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

fs: tftp: Switch to dentry cache implementation ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

fs: nfs: Switch to dentry cache implementation ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

fs: ubifs: Switch to dentry cache implementation ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

i.MX: iomuxv3: restore NO_PAD_CTRL semantic ...

A NO_PAD_CTRL flag used to keep a pad configuration untouched.
With commit 094820a63bfd ("i.MX: iomuxv3: Use helper functions in iomux-v3.h")
the NO_PAD_CTRL semantic changed to set a pad configurations to zero, which
breaks non-DT boards, where NO_PAD_CTRL is freqently used to keep a boot-up
default pad configuration, which often is non zero.

Restore the old semantic, dont write PAD_CTRL when NO_PAD_CTRL is set.

Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scripts: imx-image: fix build with OpenSSL 1.1.x ...

OpenSSL 1.1.x made some of the types opaque, so peeking inside directly
doesn't work anymore. Use the correct accessors instead.

I've dropped the algorithm check, as EVP_PKEY_get0_RSA() already verifies
that the pubkey is RSA and returns NULL if it isn't.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: MMU: fix arch_remap_range() across section boundaries ...

Fixes: e3e54c6441 ARM: mmu: Implement on-demand PTE allocation

PGD_FLAGS_WC_V7 lacks the PMD_TYPE_SECT and PMD_SECT_BUFFERABLE flags.
Without them a dma_alloc_writecombine() creates an invalid section when
it crosses a section boundary.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

fs: ext4: Switch to dentry cache implementation ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

fs: devfs: Switch to dentry cache implementation ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

fs: ramfs: Switch to dentry cache implementation ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

fs: dentry cache implementation ...

This adds the Linux dentry cache implementation to barebox.

Until now every filesystem driver resolves the full path to a file for
itself. This leads to code duplication and is error prone since
resolving paths is a complicated task. Also it can narrow down the
lookup performance since barebox only knows ASCII paths and has no way
of caching lookups.

With this patch we get the Linux dcache implementation. The path
resolving code from fs/namei.c is nearly taken as-is, minus the RCU
and locking code. Dcaching is made simple as of now: We simply cache
everything and never release any dentries. Although we do reference
counting for inodes and dentries it is effectively not used yet.
We never free anything until a fs is unmounted in which case we free
everything no matter if references are taken or not.

This patch also contains a wrapper in fs/legacy.c to support
filesystems with the old API.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

cmdlinepart: Allow empty string ...

Currently when cmdlinepart_do_parse() is called with an empty
partitions string then an unnamed partition with size 0 is created.
This is wrong of course and instead no partition should be
created.

With this barebox no longer crashes while booting when all partitions
are deleted on the commandline using "nand0.partitions="

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>