Merge branch 'for-next/socfpga'

Merge branch 'for-next/parameter-types'

Merge branch 'for-next/omap'

Merge branch 'for-next/mvebu'

Merge branch 'for-next/misc'

Merge branch 'for-next/libgen'

Merge branch 'for-next/imx'

Merge branch 'for-next/dts'

Merge branch 'for-next/arm'

imx-bbu-nand-fcb: add support for imx6ul ...

imx6ul secure the fcb with bch 40. The imx-kobs tool use a own modified
bch lib. They reverse the bit order of the data and the ecc.
To use the bch lib in barebox the bytes in the data buffers must be
reversed.
The data layout on nand is bit aligned. But with 40 bits this is not an
issue for imx6ul now.

Signed-off-by: Jan Remmet <J.Remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

dts: update to v4.11-rc8 ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Release v2017.05.0 ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: boards: Add MLO handler for EMMC devices ...

This patch enables the barebox handler to flash MLOs on EMMC devices
with 'barebox_update'.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: mach-omap: Change file flags in emmc handler ...

This handler tries to read from a file descriptor with 'write only'
flags and fails. Add read permissions for the file, so the handler can
read the partition layout.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

state: Create alias in of_state_fixup() ...

When the kernel device tree is fixed up we assume that it doesn't
have a state node, so we must also assume that it doesn't have
a alias. Create it.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

state: Make an alias mandatory ...

The userspace barebox-state utility gets confused when no alias exists.
Make the alias mandatory, so that people make it right^tm without having
to ask.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

state: warn when a state node will be overwritten ...

People do not seem to know that a state node in the kernel
device tree will be overwritten by barebox. Print a warning
when this happens so that people can get an idea why changes
in the kernel device tree state node do not have any effect.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

state: Binding: remove @0 from node name ...

The '@0' suffix is for nodes which have a reg property, so
do not use this suffix in the state example node which does
not have a reg property.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: socfpga: add arria10 defconfig ...

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: socfpga: add support for reflex achilles board ...

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

state: backend_bucket_circular: drop unused free_pattern constant ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

net: rtl8139: drop unused rtl8139_intr_mask constant ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: be more verbose about wrong bus-width ...

If configured or default bus-width is wrong for the current hardware,
registration of card/emmc is likely to fail.  This patch adds more verbosity
in the case of a failed detection:

    | omap-hsmmc 48060000.mmc: registered as 48060000.mmc
    | mmc0: detected MMC card version 4.41
    | mmc0: Changing MMC bus width failed: -110
    | mmc0: Card's startup fails with -110

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: socfpga: add arria10 clk drivers ...

Arria10 has a (slightly) different clock controller than the
Cyclone5. Add new drivers for it.

This driver only reads out the setup and builds the clocktree,
it does not setup any clocks.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: socfpga: add arria10 support ...

Arria10 is a SoC + FPGA like the Cyclone5 SoCFPGA that
is already supported in barebox.
Both a the same in some parts, but totaly different in
others. Most of the hardware blocks are the same in the
SoC parts. The OCRAM is larger on the Arria10 and the
SDRAM controller is different.
The serial core only supports 32bit accesses (different to
the 8bit accesses on the Cyclone5).

As Arria10 has 256KB of OCRAM, it is possible to fit a larger
barebox (and/or use PBL) instead of the two stage bootprocess
used on the Cyclone5 and its 64KB OCRAM.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: socfpga: make debug_ll configurable ...

Allow configuring the serial port and clock rate
instead of hardcoding it.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

net: designware: add dwmac-3.72a compatible ...

This compatible will be needed for Arria10.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: socfpga: move driver to subdirectory ...

Prepare for Arria10 clock driver.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: socfpga: rename socfpga->cyclone5 ...

Prepare the SoCFPGA code base for different system types
(Arria10, Stratix10,...).

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

commands: add spd_decode to the 'hardware manipulation' group ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>