kbuild: Add missing semicolon ...

Fixes: 4fafb35d925e5 ("kbuild: cherry-pick changes from Linux v5.0-rc3")

The change cherry-picked from the Kernel commit 7d0ea2524202 ("kbuild: use
'else ifeq' for checksrc to improve readability") also removed the
trailing semicolons from the cmd_*checksrc lines. These were removed in
kernel commit e5d289100d ("kbuild: remove trailing semicolon from cmd_*
passed to if_changed_rule"), but seems the barebox Kbuild version is not
yet ready for this change. Without the semicolons a make C=1 build fails
with:

No such file: echo

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>

Merge branch 'for-next/rpi'

Merge branch 'for-next/pci'

Merge branch 'for-next/nfs'

Merge branch 'for-next/mmc-esdhc'

Merge branch 'for-next/misc'

Merge branch 'for-next/mips'

Merge branch 'for-next/lseek'

Merge branch 'for-next/kbuild'

Merge branch 'for-next/imx'

Merge branch 'for-next/e1000'

Merge branch 'for-next/dts'

Merge branch 'for-next/digest'

Merge branch 'for-next/arm-mmu'

Merge branch 'for-next/arm'

Release v2019.02.0 ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Revert "images: Drop unnecessary fix_size" ...

This reverts commit 5c0e165.

The fix_size scripts is not necessary for newer ARM toolchains,
it is however necessary for the older ARM toolchains (gcc-5 and older).

The original reason to drop fix_size was that it doesn't work on MIPS.
With this patch we add the -i flag so that we ignore unknown images
and can succesfully build MIPS images.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: dts: am335x-phytec: Use phy-handle instead of phy_id ...

Update am335x-phytec som device trees and use phy-handle instead of phy_id.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

net: ethernet: cpsw: cpsw-phy-sel: Use phandle for phy sel ...

With the usage of the interconnect target module hierarchy in device tree the
cpsw-phy-sel node moved to the system control module. An phandle has
been added instead to the device tree include.

Try to use the cpsw-phy-sel phandle first then fall back looking for the
cpsw-phy-sel child.

This patch is based on the upstream kernel patch:
18eb8aea7fb2 ("net: ethernet: cpsw-phy-sel: prefer phandle for phy sel")

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: mach-omap: am335x_generic: Enable nodes by alias where needed ...

With the interconnet target module hierarchy the node names used to enable boot
devices are not unique any more. Find those nodes by alias now.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

drivers: of: Add function to enable and register a device by alias ...

In some cases node names are not unique and passing the full path is really long.
So make add a new device by passing the alias string possible.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: configs: am33xx_mlo_defconfig: Enable ti-sysc bus driver ...

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: configs: omap_defconfig: Enable ti-sysc bus driver ...

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

drivers: bus: Add ti-sysc bus driver ...

Adds minimal support for the sysc interconnect target module found
on many TI SoCs. With this device tree includes have been rearagned.
We need the driver to probe the child devices of the bus.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

nvmem: eeprom_93xx46: fix whitespaces ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

net: phy: micrel: backport ksz9031 125MHz ref-clk workaround ...

This patch backports linux commit e1b505a60366 ("net: phy: micrel: add
125MHz reference clock workaround").

8<--------------------- The original commit message -------------------

net: phy: micrel: add 125MHz reference clock workaround

The micrel KSZ9031 phy has a optional clock pin (CLK125_NDO) which can be
used as reference clock for the MAC unit. The clock signal must meet the
RGMII requirements to ensure the correct data transmission between the
MAC and the PHY. The KSZ9031 phy does not fulfill the duty cycle
requirement if the phy is configured as slave. For a complete
describtion look at the errata sheets: DS80000691D or DS80000692D.

The errata sheet recommends to force the phy into master mode whenever
there is a 1000Base-T link-up as work around. Only set the
"micrel,force-master" property if you use the phy reference clock provided
by CLK125_NDO pin as MAC reference clock in your application.

Attenation, this workaround is only usable if the link partner can
be configured to slave mode for 1000Base-T.

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
[m.felsch@pengutronix.de: fix dt-binding documentation]
[m.felsch@pengutronix.de: use already existing result var for read/write]
[m.felsch@pengutronix.de: add error handling]
[m.felsch@pengutronix.de: add more comments]
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
8<---------------------------------------------------------------------

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX8MQ: Add corner case for Rev 2.1 silicon ...

Rev 2.1 of i.MX8MQ silicon needs a special check different from
predecessor. Add all of the neccessary code to do just that (based on
similar code in vendor U-Boot tree).

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX8MQ: Read only ROM version major ...

Don't read all 32-bits located at IMX8MQ_ROM_VERSION_*0 since that,
besides ROM version major in LSB, willl also contain minor components
which we don't account for in the following checks. Change the code to
only read LSB instead.

This is a port of a vendor U-Boot[1] commit
0377dc8 ("MLK-19465 imx8mq: Fix cpu
rev issue on B0.1 chip")

[1] https://source.codeaurora.org/external/imx/uboot-imx
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX8MQ: Invert the logic in imx8mq_cpu_revision() ...

Invert the logic in imx8mq_cpu_revision() and convert it to use early
return. This is done in perparation for more corner case logic added
in the following commits. No functional change intended.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

memory: of_fixup: adapt to new memory layout ...

Since kernel 4.16 the memory nodes got a @<reg> suffix so the fixup
won't work correctly anymore, because instead of adapting the extisting
one the fixup creates a new node and keeps the old (maybe incorrect)
node.

To be compatible with the old and new layout delete the found memory
node and create a new one. The new node follows the new @<reg> style.

The patch also renames the node parameter to make it clearer.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>