efi: turn set of defines into enumerations ...

This allows us to use enum types instead of plain integers ttypes to
hold the values, which is done in a follow up commit.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: copy over some Linux PCI helpers ...

Linux PCI drivers, like the incoming 8250_pci, make use of these
helpers. Port them over from Linux v5.4.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: add driver_data member to struct pci_device_id ...

Linux drivers have a driver data member in the struct to associate
variant specific driver data with each device id. Do likewise in
barebox.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

x86: efi: lds: don't discard any relocation sections ...

The incoming EFI PCI root bridge IO protocol driver will register
PCI fixups. Executing them will fail because the hook function's
relocation information is stripped from the final barebox.efi binary.

Instead of adding each section by name, just keep all .rela* sections
in the final binary.

This doesn't yet increase the size of the resulting barebox (yet).

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

efi: fix off-by-one in mem_malloc_init(..., end) ...

The second (end) parameter of mem_malloc_init() denotes the last address
in the malloc region, so we need to subtract one from the current value
to arrive at the correct end. So far this went not noticed, because iomem
doesn't yet display barebox malloc memory region.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

driver: add missing parentheses around macro argument ...

Currently, the macro can't be used for more complex expressions
like &pci_dev->dev. Fix this by adding the missing parentheses.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

efi: add and use new efi_device_has_guid helper ...

We have at least two places where we check if a efidev has a particular
guid and a follow-up commit will introduce a third place.

So lets factor it out into a helper.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Add layerscape PCIe driver ...

This adds support for the designware based PCIe controller found on
Layerscape SoCs. The driver is based on Linux-5.4. The device tree
fixups have been taken from U-Boot 2019.10.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Return directly when num-lanes is not found ...

Port of Linux commit 66de33f

    The num-lanes is optional since it is not needed on some platforms
    that bring up the link in firmware.

    The link programming is based on the num-lanes properties (which is
    optional); if it is not present code must return instead of fiddling
    with the lanes value to print an error message.

    Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
    Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Reviewed-by: Andrew Murray <andrew.murray@arm.com>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Sync register definitions with Linux-5.4 ...

Update the dwc register definitions with Linux-5.4 to make further
syncinf with the Linux driver easier.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: rename readl/writel_dbi ops to read/write_dbi ...

struct dw_pcie_ops read/writel_dbi functions can read values of any
size, so with readl/writel they are misnamed. Rename them to read/write
which also matches the kernel driver.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Cleanup DBI,ATU read and write APIs ...

Port of Linux commit 7bc082d

    Cleanup DBI read and write APIs by removing leading "__" (underscore)
    from their names as there is no reason to have leading underscores
    in the first place in the function definition.

    Remove dbi/dbi2 base address parameters as the same behaviour can be
    obtained through read and write APIs. Since dw_pcie_{readl/writel}_dbi()
    APIs can't be used for ATU read/write as ATU base address could be
    different from DBI base address, implement ATU read/write APIs using ATU
    base address without using dw_pcie_{readl/writel}_dbi() APIs.

    Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
    Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Acked-by: Jingoo Han <jingoohan1@gmail.com>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: imx6: Share PHY debug register definitions ...

Port of Linux commit 60ef4b0

    Both pcie-designware.c and pci-imx6.c contain custom definitions for
    PHY debug registers R0/R1 and on top of that there's already a
    definition for R0 in pcie-designware.h. Move all of the definitions to
    pcie-designware.h. No functional change intended.

    Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
    Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
    Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Cc: Bjorn Helgaas <bhelgaas@google.com>
    Cc: Chris Healy <cphealy@gmail.com>
    Cc: Lucas Stach <l.stach@pengutronix.de>
    Cc: linux-kernel@vger.kernel.org
    Cc: linux-pci@vger.kernel.org

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Fix ATU identification for designware version >= 4.80 ...

Port of Linux commit 2aadcb0

    Synopsys designware version >= 4.80 uses a separate register space
    for programming ATU. The current code identifies if there exists a
    separate register space by accessing the register address of ATUs
    in designware version < 4.80. Accessing this address results in
    abort in the case of K2G.

    Fix it here by adding "version" member to struct dw_pcie. This should be
    set by platform specific drivers and designware core will use it to
    identify if the platform has a separate ATU space. For platforms which
    have not populated the version member, the old method of identification
    will still be used.

    Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
    Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Enable iATU unroll for endpoint too ...

Port of Linux commit a9f4c2d

    iatu_unroll_enabled flag is set only for Designware in host mode.

    However iATU unroll can be applicable for endpoint mode too. Set
    iatu_unroll_enabled flag in dw_pcie_setup() which is common for
    both host mode and endpoint mode.

    Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
    Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Make use of BIT() in constant definitions ...

Port of Linux commit 0e11faa

    Avoid using explicit left shifts and convert various definitions to
    use BIT() instead. No functional change intended.

    Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
    [lorenzo.pieralisi@arm.com: fixed PORT_LOGIC_SPEED_CHANGE redefinition]
    Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
    Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Cc: Bjorn Helgaas <bhelgaas@google.com>
    Cc: Fabio Estevam <fabio.estevam@nxp.com>
    Cc: Chris Healy <cphealy@gmail.com>
    Cc: Lucas Stach <l.stach@pengutronix.de>
    Cc: Leonard Crestez <leonard.crestez@nxp.com>
    Cc: "A.s. Dong" <aisheng.dong@nxp.com>
    Cc: Richard Zhu <hongxing.zhu@nxp.com>
    Cc: linux-imx@nxp.com
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-kernel@vger.kernel.org
    Cc: linux-pci@vger.kernel.org

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Add dw_pcie_disable_atu() ...

This adds dw_pcie_disable_atu() taken from Linux-5.4. This is needed by
the upcoming Layerscape driver.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Make use of IS_ALIGNED() ...

Port of Linux commit 4f8bbd2

    Make the intent a bit more clear as well as get rid of explicit
    arithmetic by using IS_ALIGNED() to determine if "addr" is aligned to
    "size". No functional change intended.

    Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
    Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
    Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Cc: Bjorn Helgaas <bhelgaas@google.com>
    Cc: Fabio Estevam <fabio.estevam@nxp.com>
    Cc: Chris Healy <cphealy@gmail.com>
    Cc: Lucas Stach <l.stach@pengutronix.de>
    Cc: Leonard Crestez <leonard.crestez@nxp.com>
    Cc: "A.s. Dong" <aisheng.dong@nxp.com>
    Cc: Richard Zhu <hongxing.zhu@nxp.com>
    Cc: linux-imx@nxp.com
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-kernel@vger.kernel.org
    Cc: linux-pci@vger.kernel.org

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Don't hard-code DBI/ATU offset ...

Port of Linux commit 6d6b05e

    The DWC PCIe core contains various separate register spaces: DBI, DBI2,
    ATU, DMA, etc. The relationship between the addresses of these register
    spaces is entirely determined by the implementation of the IP block, not
    by the IP block design itself. Hence, the DWC driver must not make
    assumptions that one register space can be accessed at a fixed offset from
    any other register space. To avoid such assumptions, introduce an
    explicit/separate register pointer for the ATU register space. In
    particular, the current assumption is not valid for NVIDIA's T194 SoC.

    The ATU register space is only used on systems that require unrolled ATU
    access. This property is detected at run-time for host controllers, and
    when this is detected, this patch provides a default value for atu_base
    that matches the previous assumption re: register layout. An alternative
    would be to update all drivers for HW that requires unrolled access to
    explicitly set atu_base. However, it's hard to tell which drivers would
    require atu_base to be set. The unrolled property is not detected for
    endpoint systems, and so any endpoint driver that requires unrolled access
    must explicitly set the iatu_unroll_enabled flag (none do at present), and
    so a check is added to require the driver to also set atu_base while at
    it.

    Signed-off-by: Stephen Warren <swarren@nvidia.com>
    Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
    Acked-by: Vidya Sagar <vidyas@nvidia.com>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mfd: da9053: fix typo in variable name ...

Fixes: 06928c7d1758 (mfd: da9053: use new reset_source_set_device)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

image: add zynqimg to gitignore ...

Those are results of the Zynq image build, don't clobber the
git status output.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

net: designware: eqos: fix NULL pointer use in dev_printf ...

Inside mdio_register, a read of the PHY's id register is attempted.
If it fails, we print an error message with eqos_err, which uses the
ethernet device's unique name, but at this time there has been none set,
because eth_register was not yet called. Fix this by using the MDIO bus
device instead.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

net: designware: eqos: enable clocks before mdio_register ...

We can't be using the MAC including the MDIO controller while the clocks
are off, but this is exactly the case when mdio_register is called and
the interface is not yet up. To allow reading the PHY id to succeed
before the interface is up, turn on the clocks as part of the
initialization in the probe.

This fixes following error at probe time:

    ERROR: <NULL>: MDIO not idle at entry

The NULL is fixed in a follow-up commit.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

net: designware: eqos: properly stop DMA on halt ...

Specifying ->halt only means that it's called along with eth_unregister.
If we want to halt the DMA, we will have to call it ourselves in the
remove callback. Do this.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

filetype: mvebu: Fix kwbimage v1 detection ...

The kwbimage detection calculates a checksum over the first 31 bytes of
the image. This is correct for the v0 image format, but for the v1 image
format the checksum in the image also covers the extenstion headers.
These might not be completely present in the initial buffer provided to
file_detect_type(), so just drop the checksum calculation for v1 images.

Fixes: bf8b6d46db ("kwbimage_v0: add support to detect and boot a mvebu v0 image")
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

usb: dwc3: Remove wrong error messages ...

When phy_get() returns -ENOSYS or -ENODEV it means we can go without
phy. Do not print an error message in this case.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

net: designware: eqos: stop DMA on halt ...

designware_eqos.c contains an eqos_stop implementation to stop the NIC
when halting the interface. Unfortunately it wasn't used leading to
memory corruption on boot, possibly due to DMA. Fix this.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: am335x: Fix am335x_sdram_size() not running at link address ...

am335x_sdram_size() may be called when we are not running at the
address we are linked at. This means tree switch conversions and
jump tables will not work. Disable these in the CFLAGS for this
file.
This fixes a crash in am335x_sdram_size() with newer gcc versions.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: am335x: Enable MMC2 clock ...

Since Kernel commit 5b63fb90adb9 ("ARM: dts: Fix incomplete dts data for
am3 and am4 mmc") (barebox commit 419db1f984 ("dts: update to
v5.3-rc7")) the AM33xx MMC2 controller is unconditionally enabled in the
dts. This has the effect that the driver probes for this device and then
can't access the registers as the clock is disabled. Enable the clock to
let the driver probe successfully.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu-early: On i.MX6 with HAB map ROM is mapped without XN ...

On i.MX6 with HAB enabled we call into the ROM later in
imx6_hab_get_status(). This only works when the XN bit is not set for
this area, so remap the first MiB as cached which doesn't have the XN
bit set.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>