LuminaSensum/barebox

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LuminaSensum / barebox

2017-03-10	v2017.03.0 a614f64 Browse files » Release v2017.03.0 ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 10 Mar 2017
2017-03-09	400988a Browse files » usb: imx: Fix setting of dev->priv ... Since fc10539f7d the usbmisc pointer must be stored in dev->priv, but dev->priv has never been set. Fix this. Fixes: fc10539f7d usb: imx: Make usb-misc multi instance safe Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 9 Mar 2017
	d6ef702 Browse files » usb: imx: role_registered contains role ... role_registered contains the role, it's not a bool indicating that a role is registered. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 9 Mar 2017
	19d5f3a Browse files » ARM: imx233-olinuxino: add CONFIG_CONSOLE_ACTIVATE_ALL ... if not set, barebox will use first console by default. On this board first console is KEYBOARD_GPIO, so we will end in unusable state. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Oleksij Rempel authored on 7 Mar 2017 Sascha Hauer committed on 9 Mar 2017
2017-03-06	ffdb340 Browse files » video: sdl fix typo ... Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Jean-Christophe PLAGNIOL-VILLARD authored on 6 Mar 2017 Sascha Hauer committed on 6 Mar 2017
2017-03-06	db5a5e3 Browse files » dma: apbh_dma: add missing array termination ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 6 Mar 2017
2017-03-03	da2ec36 Browse files » clk: imx: clk-imx6ul: Fixed conditional for enabling USB phy clocks ... Signed-off-by: Robin van der Gracht <robin@protonic.nl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Robin van der Gracht authored on 3 Mar 2017 Sascha Hauer committed on 3 Mar 2017
	7497685 Browse files » ARM: execute DMB before trying to flush cache ... The CPU write buffer needs to be coherent with the cache, otherwise we might flush stale entries with the actual data stuck in the cache. This is really important on newer CPU core with bigger write buffers. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 1 Mar 2017 Sascha Hauer committed on 3 Mar 2017
	d92ce9b Browse files » ARM: correctly identify ARMv6 K/Z ... The ARMv6 K/Z derivatives have a v7 compatible MMU, but all other parts (including the cache handling) is still at v6. As we don't make use of the more advanced features of the v7 MMU in Barebox, it's okay to just override this to properly identify the CPU as ARMv6. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 1 Mar 2017 Sascha Hauer committed on 3 Mar 2017
	0d0b426 Browse files » ARM: align exception vectors to 32 byte ... On ARMv7 the exception vectors inside the barebox binary are used directly by remapping the vectors base through the VBAR register. While VBAR allows to remap the exception vectors freely, it still imposes a minimum alignment of 32 byte, as the lower bits are treated as the exception vector offset. Enforce this alignment inside the barebox binary. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 1 Mar 2017 Sascha Hauer committed on 3 Mar 2017
2017-03-02	e2805b5 Browse files » scripts: mxsimage: Fix build with OpenSSL < 1.1.x ... Move the compatibility wrapper functions up so that they are defined before they are used. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 2 Mar 2017
	faa369e Browse files » nand-bb: fix writing to the end of a .bb device ... As nand_bb_write_buf calls mtd_write(bb->mtd, cur_ofs, now, ...) the limit that now should be checked against is bb->mtd->size - cur_ofs. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Uwe Kleine-König authored on 1 Mar 2017 Sascha Hauer committed on 2 Mar 2017
	e0ff988 Browse files » memcmp: fix comparison on short read ... read() might return less than $count bytes which is only an upper limit. The user is supposed to repeat the command to fill a buffer completely. So use the convenience wrapper read_full in memcmp. This fixes memcmp on /dev/nand0 on an Armada XP. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Uwe Kleine-König authored on 1 Mar 2017 Sascha Hauer committed on 2 Mar 2017
2017-03-01	019606d Browse files » commands/mmc_extcsd: Relicense under GPLv2+ ... GPLv3 is incompatible with the projects license. Relicense file under GPLv2+ Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Daniel Schultz <d.schultz@phytec.de> Sascha Hauer committed on 1 Mar 2017
2017-02-22	a02e9d5 Browse files » ARM: i.MX50: do not pass base address to imx53_boot_save_loc ... This is a follow-up on commit cf3dfafff4cb. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Alexander Kurz authored on 19 Feb 2017 Sascha Hauer committed on 22 Feb 2017
2017-02-14	b225bbf Browse files » i.MX: esdhc: fix imx-esdhc driver for non-OF boards ... Commit 39f7a7ee8b68 ("i.MX: esdhc: Do not rely on CPU type for quirks") made imx-esdhc dependent on OF and broke probing for all non-OF boards. Since newer platforms like mx6 and vf610 are restricted to OF, the non-OF probing only needs to distinguish mx5 vs earlier SoC. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Alexander Kurz authored on 11 Feb 2017 Sascha Hauer committed on 14 Feb 2017
2017-02-14	45164aa Browse files » i.MX: i2c: fix i2c-fsl for non-OF boards ... With commit 4ed5b778a56b ("i.MX: i2c: Add Vybrid support") i2c-fsl probe returns -EINVAL for all non-OF boards. Since newer planforms, especially vf610 are restricted OF-only it is safe to assume "fsl,imx21-i2c" if CONFIG_OFDEVICE is not set. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Alexander Kurz authored on 11 Feb 2017 Sascha Hauer committed on 14 Feb 2017
2017-02-13	4afb09c Browse files » Merge branch 'for-next/net' Sascha Hauer committed on 13 Feb 2017
	5a30fae Browse files » Merge branch 'for-next/mvebu' Sascha Hauer committed on 13 Feb 2017
	2cd2bad Browse files » Merge branch 'for-next/misc' Sascha Hauer committed on 13 Feb 2017
	3013916 Browse files » Merge branch 'for-next/imx' Sascha Hauer committed on 13 Feb 2017
	bb1a6a2 Browse files » Merge branch 'for-next/efi' Sascha Hauer committed on 13 Feb 2017
	a065132 Browse files » Merge branch 'for-next/dts' Sascha Hauer committed on 13 Feb 2017
	a9ba8a1 Browse files » Merge branch 'for-next/arm' Sascha Hauer committed on 13 Feb 2017
	19df384 Browse files » ARM: i.MX7: Add PSCI support ... This adds the SoC specific PSCI bits for i.MX7. Based on the corresponding U-Boot code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 13 Feb 2017
	cc407b4 Browse files » ARM: Add PSCI support ... This patch contains the barebox implementation for the ARM "Power State Coordination Interface" (PSCI). The interface is aimed at the generalization of code in the following power management scenarios: * Core idle management. * Dynamic addition and removal of cores, and secondary core boot. * big.LITTLE migration. * System shutdown and reset. In practice, all that's currently implemented is a way to enable the secondary core one some SoCs. With PSCI the Kernel is either started in nonsecure or in Hypervisor mode and PSCI is used to apply power to the secondary cores. The start mode is passed in the global.bootm.secure_state variable. This enum can contain "secure" (Kernel is started in secure mode, means no PSCI), "nonsecure" (Kernel is started in nonsecure mode, PSCI available) or "hyp" (Kernel is started in hyp mode, meaning it can support virtualization). We currently only support putting the secure monitor code into SDRAM, which means we always steal some amount of memory from the Kernel. To keep things simple for now we simply keep the whole barebox binary in memory The PSCI support has been tested on i.MX7 only so far. The only supported operations are CPU_ON and CPU_OFF. The PSCI and secure monitor code is based on the corresponding U-Boot code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 13 Feb 2017
2017-02-10	436fb44 Browse files » config: Set UART port 2 as debug port ... Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Wadim Egorov authored on 9 Feb 2017 Sascha Hauer committed on 10 Feb 2017
	49b321f Browse files » serial: ns16550: Set read/write functions depending on reg-io-width ... Set proper register read/write functions depending on reg-io-width device tree property. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Wadim Egorov authored on 9 Feb 2017 Sascha Hauer committed on 10 Feb 2017
	14c6fc9 Browse files » ARM: phycore-rk3288: Use UART2 as debug output ... RK3288's UART2 is the default debug uart interface. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Wadim Egorov authored on 9 Feb 2017 Sascha Hauer committed on 10 Feb 2017
	cbf19c9 Browse files » dts: update to v4.10-rc6 ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 10 Feb 2017